cgtqmx6eval has an eMMC connected to ESDHC3.
Add support for it.
Signed-off-by: Otavio Salvador otavio@ossystems.com.br ---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 24 ++++++++++++++++++++++-- include/configs/cgtqmx6eval.h | 1 + 2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 3b1f16c..bb8d07f 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -49,6 +49,20 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(USDHC_PAD_CTRL), };
+static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -71,6 +85,7 @@ static void setup_iomux_uart(void) #ifdef CONFIG_FSL_ESDHC static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, };
@@ -84,6 +99,9 @@ int board_mmc_getcd(struct mmc *mmc) gpio_direction_input(IMX_GPIO_NR(1, 4)); ret = !gpio_get_value(IMX_GPIO_NR(1, 4)); break; + case USDHC3_BASE_ADDR: + ret = 1; /* eMMC is always present */ + break; case USDHC4_BASE_ADDR: gpio_direction_input(IMX_GPIO_NR(2, 6)); ret = !gpio_get_value(IMX_GPIO_NR(2, 6)); @@ -101,12 +119,14 @@ int board_mmc_init(bd_t *bis) int i;
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); imx_iomux_v3_setup_multiple_pads(usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- for (i = 0; i < 2; i++) { + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { status = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); if (status) return status; diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 9d9e388..63264d9 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -27,6 +27,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE
/* MMC Configs */ +#define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* Miscellaneous commands */