-----Original Message----- From: Marek Vasut [mailto:marex@denx.de] Sent: Thursday, June 09, 2016 6:58 PM To: Sriram Dash sriram.dash@nxp.com; u-boot@lists.denx.de Cc: york sun york.sun@nxp.com; albert.u.boot@aribaud.net; Rajesh Bhagat rajesh.bhagat@nxp.com Subject: Re: [PATCH v3 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
On 06/09/2016 02:21 PM, Sriram Dash wrote:
Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms, similar to PPC and ARMv7.
Signed-off-by: Sriram Dash sriram.dash@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v1:
- Added commit message
Changes in v2:
- No update
So what changed in V3 here ?
Typo mistake. Will take care in v4.
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 +++++++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++ 4 files changed, 14 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 9a5a6b5..9c575c1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core) return -1; /* cannot identify the cluster */ }
+uint get_svr(void) +{
- struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
- return gur_in32(&gur->svr);
+}
#ifdef CONFIG_DISPLAY_CPUINFO int print_cpuinfo(void) { diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index e98e055..8b8a7c1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -596,4 +596,6 @@ struct ccsr_cci400 { #define SCR0_CLIENTPD_MASK 0x00000001 #define SCR0_USFCFG_MASK 0x00000400
+uint get_svr(void);
#endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 65b3357..e48bbaf 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -319,4 +319,7 @@ struct ccsr_reset { u32 ip_rev1; /* 0xbf8 */ u32 ip_rev2; /* 0xbfc */ };
+uint get_svr(void);
#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 02ecc62..f244904 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -53,6 +53,8 @@ struct cpu_type { #define SVR_MIN(svr) (((svr) >> 0) & 0xf) #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) +#define IS_SVR_REV(svr, maj, min) \
((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min))This is susceptible to macro expansion problems, you need parenthesis around all the macro args: ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
Ok. Will take care in v4.
/* ahci port register default value */ #define AHCI_PORT_PHY_1_CFG 0xa003fffe
-- Best regards, Marek Vasut