From: Peng Fan peng.fan@nxp.com
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, set_wdog_reset function could be handled by imx_watchdog.c driver.
Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi | 4 ++++ board/kontron/sl-mx8mm/spl.c | 18 ------------------ 2 files changed, 4 insertions(+), 18 deletions(-)
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi index 22d18e6f1cf..6882513f161 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi @@ -126,3 +126,7 @@ &wdog1 { u-boot,dm-spl; }; + +&pinctrl_wdog { + u-boot,dm-spl; +}; diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index a58a75dc958..63361f1d2ab 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -32,7 +32,6 @@ enum {
#define GPIO_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) -#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
#define TOUCH_RESET_GPIO IMX_GPIO_NR(3, 23)
@@ -50,10 +49,6 @@ static iomux_v3_cfg_t const touch_gpio[] = { IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL) };
-static iomux_v3_cfg_t const wdog_pads[] = { - IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), -}; - int spl_board_boot_device(enum boot_device boot_dev_spl) { switch (boot_dev_spl) { @@ -216,17 +211,6 @@ void spl_board_init(void) printf("Failed to find clock node. Check device tree\n"); }
-int board_early_init_f(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; - - imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - - set_wdog_reset(wdog); - - return 0; -} - static int power_init_board(void) { struct udevice *dev; @@ -261,8 +245,6 @@ void board_init_f(ulong dummy)
init_uart_clk(2);
- board_early_init_f(); - timer_init();
/* Clear the BSS. */