13 Aug
2015
13 Aug
'15
3:19 p.m.
On Fri, Jul 24, 2015 at 09:22:14AM +0200, Alexander Stein wrote:
This adds dcache support for dwc2. The DMA buffers must be DMA aligned and is flushed for outgoing transactions before starting transfer. For ingoing transactions it is invalidated after the transfer has finished.
Signed-off-by: Alexander Stein alexanders83@web.de Acked-by: Stephen Warren swarren@wwwdotorg.org
Applied to u-boot/master, thanks!
--
Tom