This series converts the PCI host controller drivers used by MIPS Malta and the board-specific PCI setup code to PCI driver model. Because the AMD PCNET driver is already converted to ETH driver model, simply enable CONFIG_DM_ETH as well.
A patch in PCI uclass core is currently required for MIPS wanting to use PCI DM (except Octeon MIPS64) due to CONFIG_SYS_SDRAM_BASE being used as a virtual address on all MIPS boards.
The series for now is only tested with Qemu and the GT64120 PCI controller. The Malta Qemu tests are already covered by U-Boot CI Support for the MSC01 controller is prepared. The used PCI controller depends on the plugged core card (Qemu emulates the CoreLV card with GT64120).
Dynamic selection of the according PCI DT nodes via CONFIG_OF_BOARD_FIXUP is prepared but not yet enabled. This requires fixing of the call order of fix_fdt() in board_init_f, otherwise the passed-in rw_fdt_blob pointer will point to a read-only NOR flash address. I'll send a separate RFC patch for this.
I'll send a cleanup series for removing non-DM code after the merge windows has closed and the PCI DM conversion deadline has been enforced.
Daniel Schwierzeck (6): dm: pci: add option to map virtual system memory base address pci: gt64120: convert to driver model pci: msc01: convert to driver model MIPS: malta: add DT bindings for PCI host controller MIPS: malta: add support for PCI driver model MIPS: malta: enable PCI driver model
arch/mips/Kconfig | 4 ++ arch/mips/dts/mti,malta.dts | 28 +++++++++++++ board/imgtec/malta/malta.c | 84 ++++++++++++++++++++++++++++++++++++- drivers/pci/Kconfig | 13 ++++++ drivers/pci/pci-uclass.c | 9 ++-- drivers/pci/pci_gt64120.c | 72 ++++++++++++++++++++++++++++++- drivers/pci/pci_msc01.c | 70 ++++++++++++++++++++++++++++++- 7 files changed, 274 insertions(+), 6 deletions(-)