This patch fixes the s3c24x0 timer code to work with the ARM relocation feature.
Signed-off-by: David Mueller d.mueller@elsoft.ch
--- arch/arm/cpu/arm920t/s3c24x0/timer.c | 40 +++++++++++++++------------------ arch/arm/include/asm/global_data.h | 7 ++++++ 2 files changed, 25 insertions(+), 22 deletions(-)
Changes for V2: - rebase to master
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index 9571870..4efceac 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -35,8 +35,7 @@ #include <asm/io.h> #include <asm/arch/s3c24x0_cpu.h>
-int timer_load_val = 0; -static ulong timer_clk; +DECLARE_GLOBAL_DATA_PTR;
/* macro to read the 16 bit timer */ static inline ulong READ_TIMER(void) @@ -46,9 +45,6 @@ static inline ulong READ_TIMER(void) return readl(&timers->tcnto4) & 0xffff; }
-static ulong timestamp; -static ulong lastdec; - int timer_init(void) { struct s3c24x0_timers *timers = s3c24x0_get_base_timers(); @@ -57,27 +53,27 @@ int timer_init(void) /* use PWM Timer 4 because it has no output */ /* prescaler for Timer 4 is 16 */ writel(0x0f00, &timers->tcfg0); - if (timer_load_val == 0) { + if (gd->timer_load_val == 0) { /* * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 * (default) and prescaler = 16. Should be 10390 * @33.25MHz and 15625 @ 50 MHz */ - timer_load_val = get_PCLK() / (2 * 16 * 100); - timer_clk = get_PCLK() / (2 * 16); + gd->timer_load_val = get_PCLK() / (2 * 16 * 100); + gd->timer_clk = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ - lastdec = timer_load_val; - writel(timer_load_val, &timers->tcntb4); + gd->lastdec = gd->timer_load_val; + writel(gd->timer_load_val, &timers->tcntb4); /* auto load, manual update of timer 4 */ tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000; writel(tmr, &timers->tcon); /* auto load, start timer 4 */ tmr = (tmr & ~0x0700000) | 0x0500000; writel(tmr, &timers->tcon); - timestamp = 0; + gd->timestamp = 0;
- return (0); + return 0; }
/* @@ -94,7 +90,7 @@ void __udelay (unsigned long usec) ulong start = get_ticks();
tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->timer_load_val * 100); tmo /= 1000;
while ((ulong) (get_ticks() - start) < tmo) @@ -105,7 +101,7 @@ ulong get_timer_masked(void) { ulong tmr = get_ticks();
- return tmr / (timer_clk / CONFIG_SYS_HZ); + return tmr / (gd->timer_clk / CONFIG_SYS_HZ); }
void udelay_masked(unsigned long usec) @@ -116,10 +112,10 @@ void udelay_masked(unsigned long usec)
if (usec >= 1000) { tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->timer_load_val * 100); tmo /= 1000; } else { - tmo = usec * (timer_load_val * 100); + tmo = usec * (gd->timer_load_val * 100); tmo /= (1000 * 1000); }
@@ -139,16 +135,16 @@ unsigned long long get_ticks(void) { ulong now = READ_TIMER();
- if (lastdec >= now) { + if (gd->lastdec >= now) { /* normal mode */ - timestamp += lastdec - now; + gd->timestamp += gd->lastdec - now; } else { /* we have an overflow ... */ - timestamp += lastdec + timer_load_val - now; + gd->timestamp += gd->lastdec + gd->timer_load_val - now; } - lastdec = now; + gd->lastdec = now;
- return timestamp; + return gd->timestamp; }
/* @@ -160,7 +156,7 @@ ulong get_tbclk(void) ulong tbclk;
#if defined(CONFIG_SMDK2400) - tbclk = timer_load_val * 100; + tbclk = gd->timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ defined(CONFIG_S3C2440) || \ diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index c3ff789..02420d8 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -67,6 +67,13 @@ typedef struct global_data { #ifdef CONFIG_IXP425 unsigned long timestamp; #endif +#ifdef CONFIG_S3C24X0 + /* "static data" needed by s3c24x0 timer.c */ + unsigned long timer_load_val; + unsigned long timer_clk; + unsigned long timestamp; + unsigned long lastdec; +#endif unsigned long relocaddr; /* Start address of U-Boot in RAM */ phys_size_t ram_size; /* RAM size */ unsigned long mon_len; /* monitor len */