Device tree header for Mercury+ AA1 module
Signed-off-by: Paweł Anikiel pan@semihalf.com --- arch/arm/dts/socfpga_mercury_aa1.dtsi | 95 +++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 arch/arm/dts/socfpga_mercury_aa1.dtsi
diff --git a/arch/arm/dts/socfpga_mercury_aa1.dtsi b/arch/arm/dts/socfpga_mercury_aa1.dtsi new file mode 100644 index 0000000000..7d0bf884a3 --- /dev/null +++ b/arch/arm/dts/socfpga_mercury_aa1.dtsi @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_arria10.dtsi" +#include "socfpga_arria10-u-boot.dtsi" + +/ { + model = "Altera SOCFPGA Arria 10"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + firmware-loader = <&fs_loader0>; + }; + + memory@0 { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; + + fs_loader0: fs-loader { + u-boot,dm-pre-reloc; + compatible = "u-boot,fs-loader"; + phandlepart = <&mmc 1>; + }; +}; + +&fpga_mgr { + u-boot,dm-pre-reloc; + altr,bitstream = "fpga.itb"; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + max-frame-size = <3800>; +}; + +&i2c1 { + u-boot,dm-pre-reloc; + + atsha204a@64 { + u-boot,dm-pre-reloc; + compatible = "atmel,atsha204a"; + reg = <0x64>; + }; +}; + +&main_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&mmc { + cap-sd-highspeed; + cap-mmc-highspeed; + broken-cd; + bus-width = <4>; + u-boot,dm-pre-reloc; +}; + +&peri_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_free_clk { + u-boot,dm-pre-reloc; +}; + +&uart1 { + u-boot,dm-pre-reloc; +};