-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Albert Aribaud Sent: Sunday, November 15, 2009 4:33 AM To: U-Boot@lists.denx.de Subject: [U-Boot] [PATCH V2 3/3] Add support for the LaCie ED Mini V2 board
This board is based on the Marvell Orion5x SoC. Current support is limited to console and Flash. Flash support uses LEGACY as the Macronix 29LV400 used on ED Mini V2 is not 100% CFI compliant.
Signed-off-by: Albert Aribaud albert.aribaud@free.fr
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/LaCie/edminiv2/Makefile | 54 +++++++++++++++ board/LaCie/edminiv2/config.mk | 27 +++++++ board/LaCie/edminiv2/edminiv2.c | 134 ++++++++++++++++++++++++++++++++++++ board/LaCie/edminiv2/edminiv2.h | 43 ++++++++++++ include/configs/edminiv2.h | 143 +++++++++++++++++++++++++++++++++++++++ 8 files changed, 409 insertions(+), 0 deletions(-) create mode 100644 board/LaCie/edminiv2/Makefile create mode 100644 board/LaCie/edminiv2/config.mk create mode 100644 board/LaCie/edminiv2/edminiv2.c create mode 100644 board/LaCie/edminiv2/edminiv2.h create mode 100644 include/configs/edminiv2.h
diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..93e57f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -512,6 +512,10 @@ Unknown / orphaned boards: # Board CPU #
############################################################## ###########
+Albert ARIBAUD albert.aribaud@free.fr
- edminiv2 ARM926EJS (Orion5x SoC)
That's good if you can move this entry above Albin Tonnerre's entry
...snip...
MPP17_GPIO,MPP18_GPIO,MPP19_GPIO,
Why not configured rest 6 gpios ?
...snip...
+/*
- GPIOs for LaCie ED Mini:
- GPIO3 is input (RTC interrupt)
- GPIO16 is Power LED control (0 = on, 1 = off)
- GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
- GPIO18 is Power Button status (0 = Released, 1 = Pressed)
- Default is LED ON
- */
+#define EDMINIV2_OE 0xfffcffff +#define EDMINIV2_OE_VAL 0x00020000
How about adding GPIO_OE? This settings are referred to GPIOs register
...snip...
+#define CONFIG_IDENT_STRING " EDMiniV2"
+/*
- High Level Configuration Options (easy to change)
- */
+#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON 1 /* CPU Core subversion */ +#define CONFIG_ORION5X 1 /* SOC Family Name */ +#define CONFIG_88F5182 1 /* SOC Name */ +#define CONFIG_MACH_EDMINIV2 1 /* Machine type */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
How you are addressing DRAM configuration? I think you need lowlevel_init.
...snip...
+/*
- Environment variables configurations
- */
+#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x2000 /* 16K */ +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET 0x4000 /* env starts here */
I don't know how this is going to work, how much flash do you have? I hope it is mapped in the end since your reset address is 0xffff0000.
Where is the code to fetch flashed image from flash to DRAM at TEXT_BASE?
I suggest you provide some more details about your board in the commit log
+/*
- Size of malloc() pool
- */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128
+/*
- Other required minimal configurations
- */
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
Same comment applies here
Regards.. Prafulla . .