This patch adds basic support for the Marvell DB-MV784MP-GP evaulation board. This is the first board that uses the recently created Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese sr@denx.de
Tested-by: Luka Perkov luka@openwrt.org ---
Changes in v3: - Added Tested-by from Luka - Rebased on current top-of-tree (git ID a1263632)
Changes in v2: - Renamed target from db-78460-bp to db-mv784mp-gp as this matches the real eval board name
arch/arm/Kconfig | 4 + board/Marvell/db-mv784mp-gp/Kconfig | 23 ++++++ board/Marvell/db-mv784mp-gp/MAINTAINERS | 6 ++ board/Marvell/db-mv784mp-gp/Makefile | 7 ++ board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c | 120 ++++++++++++++++++++++++++++ board/Marvell/db-mv784mp-gp/kwbimage.cfg | 12 +++ configs/db-mv784mp-gp_defconfig | 2 + include/configs/db-mv784mp-gp.h | 68 ++++++++++++++++ 8 files changed, 242 insertions(+) create mode 100644 board/Marvell/db-mv784mp-gp/Kconfig create mode 100644 board/Marvell/db-mv784mp-gp/MAINTAINERS create mode 100644 board/Marvell/db-mv784mp-gp/Makefile create mode 100644 board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c create mode 100644 board/Marvell/db-mv784mp-gp/kwbimage.cfg create mode 100644 configs/db-mv784mp-gp_defconfig create mode 100644 include/configs/db-mv784mp-gp.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22f0f09..c896ff8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -139,6 +139,9 @@ config ARCH_DAVINCI config KIRKWOOD bool "Marvell Kirkwood"
+config TARGET_DB_MV784MP_GP + bool "Support db-mv784mp-gp" + config TARGET_DEVKIT3250 bool "Support devkit3250"
@@ -546,6 +549,7 @@ source "board/BuS/eb_cpux9k2/Kconfig" source "board/BuS/vl_ma2sc/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" +source "board/Marvell/db-mv784mp-gp/Kconfig" source "board/Marvell/dkb/Kconfig" source "board/Marvell/gplugd/Kconfig" source "board/afeb9260/Kconfig" diff --git a/board/Marvell/db-mv784mp-gp/Kconfig b/board/Marvell/db-mv784mp-gp/Kconfig new file mode 100644 index 0000000..f94a444 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/Kconfig @@ -0,0 +1,23 @@ +if TARGET_DB_MV784MP_GP + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "db-mv784mp-gp" + +config SYS_VENDOR + string + default "Marvell" + +config SYS_SOC + string + default "armada-xp" + +config SYS_CONFIG_NAME + string + default "db-mv784mp-gp" + +endif diff --git a/board/Marvell/db-mv784mp-gp/MAINTAINERS b/board/Marvell/db-mv784mp-gp/MAINTAINERS new file mode 100644 index 0000000..a095f89 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/MAINTAINERS @@ -0,0 +1,6 @@ +DB_MV784MP_GP BOARD +M: Stefan Roese sr@denx.de +S: Maintained +F: board/Marvell/db-mv784mp-gp/ +F: include/configs/db-mv784mp-gp.h +F: configs/db-mv784mp-gp_defconfig diff --git a/board/Marvell/db-mv784mp-gp/Makefile b/board/Marvell/db-mv784mp-gp/Makefile new file mode 100644 index 0000000..8f5a7fb --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese sr@denx.de +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := db-mv784mp-gp.o diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c new file mode 100644 index 0000000..b3dae89 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2014 Stefan Roese sr@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define BIT(nr) (1UL << (nr)) + +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) + +/* + * Those values and defines are taken from the Marvell U-Boot version + * "u-boot-2011.12-2014_T1.0" for the board rd78460gp aka + * "RD-AXP-GP rev 1.0". + * + * GPPs + * MPP# NAME IN/OUT + * ---------------------------------------------- + * 21 SW_Reset_ OUT + * 25 Phy_Int# IN + * 28 SDI_WP IN + * 29 SDI_Status IN + * 54-61 On GPP Connector ? + * 62 Switch Interrupt IN + * 63-65 Reserved from SW Board ? + * 66 SW_BRD connected IN + */ +#define RD_78460_GP_GPP_OUT_ENA_LOW (~(BIT(21) | BIT(20))) +#define RD_78460_GP_GPP_OUT_ENA_MID (~(BIT(26) | BIT(27))) +#define RD_78460_GP_GPP_OUT_ENA_HIGH (~(0x0)) + +#define RD_78460_GP_GPP_OUT_VAL_LOW (BIT(21) | BIT(20)) +#define RD_78460_GP_GPP_OUT_VAL_MID (BIT(26) | BIT(27)) +#define RD_78460_GP_GPP_OUT_VAL_HIGH 0x0 + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x00000000, MVEBU_MPP_BASE + 0x00); + writel(0x00000000, MVEBU_MPP_BASE + 0x04); + writel(0x33000000, MVEBU_MPP_BASE + 0x08); + writel(0x11000000, MVEBU_MPP_BASE + 0x0c); + writel(0x11111111, MVEBU_MPP_BASE + 0x10); + writel(0x00221100, MVEBU_MPP_BASE + 0x14); + writel(0x00000003, MVEBU_MPP_BASE + 0x18); + writel(0x00000000, MVEBU_MPP_BASE + 0x1c); + writel(0x00000000, MVEBU_MPP_BASE + 0x20); + + /* Configure GPIO */ + writel(RD_78460_GP_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + writel(RD_78460_GP_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + writel(RD_78460_GP_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); + writel(RD_78460_GP_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); + writel(RD_78460_GP_GPP_OUT_VAL_HIGH, MVEBU_GPIO2_BASE + 0x00); + writel(RD_78460_GP_GPP_OUT_ENA_HIGH, MVEBU_GPIO2_BASE + 0x04); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: Marvell DB-MV784MP-GP\n"); + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* Configure and enable MV88E1545 PHY */ +void reset_phy(void) +{ + u16 devadr = CONFIG_PHY_BASE_ADDR; + char *name = "neta0"; + u16 reg; + + if (miiphy_set_current_dev(name)) + return; + + /* Enable QSGMII AN */ + /* Set page to 4 */ + miiphy_write(name, devadr, 0x16, 4); + /* Enable AN */ + miiphy_write(name, devadr, 0x0, 0x1140); + /* Set page to 0 */ + miiphy_write(name, devadr, 0x16, 0); + + /* Phy C_ANEG */ + miiphy_read(name, devadr, 0x4, ®); + reg |= 0x1E0; + miiphy_write(name, devadr, 0x4, reg); + + /* Soft-Reset */ + miiphy_write(name, devadr, 22, 0x0000); + miiphy_write(name, devadr, 0, 0x9140); + + /* Power up the phy */ + miiphy_read(name, devadr, ETH_PHY_CTRL_REG, ®); + reg &= ~(ETH_PHY_CTRL_POWER_DOWN_MASK); + miiphy_write(name, devadr, ETH_PHY_CTRL_REG, reg); + + printf("88E1545 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/db-mv784mp-gp/kwbimage.cfg b/board/Marvell/db-mv784mp-gp/kwbimage.cfg new file mode 100644 index 0000000..d7ef407 --- /dev/null +++ b/board/Marvell/db-mv784mp-gp/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese sr@denx.de +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/Marvell/db-mv784mp-gp/binary.0 0000005b 00000068 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig new file mode 100644 index 0000000..7aa216c --- /dev/null +++ b/configs/db-mv784mp-gp_defconfig @@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_DB_MV784MP_GP=y diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h new file mode 100644 index 0000000..cb03e33 --- /dev/null +++ b/include/configs/db-mv784mp-gp.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2014 Stefan Roese sr@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_DB_MV7846MP_GP_H +#define _CONFIG_DB_MV7846MP_GP_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO_LATE + +#define CONFIG_SYS_TEXT_BASE 0x04000000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_I2C +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#define CONFIG_CMD_TIME + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#define CONFIG_SPI_FLASH_STMICRO + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define CONFIG_PHY_BASE_ADDR 0x10 +#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_QSGMII +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ +#define CONFIG_RESET_PHY_R + +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_ALT_MEMTEST + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +#endif /* _CONFIG_DB_MV7846MP_GP_H */