On Thu, 16 Apr 2009 23:31:12 -0700 David Brownell david-b@pacbell.net wrote:
On Thursday 16 April 2009, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 15:44 Sun 12 Apr , David Brownell wrote:
could you split it in more logical change please
I'll fragment it a bit more, ok. later.
@@ -129,10 +122,12 @@ void davinci_enable_uart0(void) lpsc_on(DAVINCI_LPSC_UART0);
/* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
- REG(UART0_PWREMU_MGMT) = 0x00006001;
+#ifdef CONFIG_SOC_DM6446 /* Enable UART0 MUX lines */
- REG(PINMUX1) |= PINMUX1_UART0;
- REG(PINMUX1) |= DM644X_PINMUX1_UART0;
is this the same for all DM6446? and the same question for the I2C and EMAC
Yes, that's why I did it that way. PINMUX1 is part of the DM6446 SoC itself, not an FPGA or CPLD, and on other SoCs the bits in that register have different meanings assigned. UART0 might be in PINMUX4, etc.
(Or, if by "this" you meant the PWREMU_MGMT register, that's also a yes ... plus, I looked at docs for other DaVinci chips, and they all have the same definition for that register.)
Hi David, I would suggest renaming (or adding) CONFIG_SOC_DM6446 to CONFIG_SOC_DM644x and also introducing CONFIG_SOC_DM35x, so that we don't have to add a switch statement with all the variants inside one family.
Hugo V.