On Mon, May 7, 2018 at 10:11 PM Måns Rullgård mans@mansr.com wrote:
Chris Packham judge.packham@gmail.com writes:
Hi Mans, Stefano,
On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic sbabic@denx.de wrote:
On 21/04/2018 17:11, Mans Rullgard wrote:
The code attempts to preserve the value of LR by storing it in R12/IP across the lowevel_init() call. However, this register is not saved by the callee. Use a register that guaranteed to be preserved
instead.
Signed-off-by: Mans Rullgard mans@mansr.com
arch/arm/cpu/arm926ejs/start.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S
index 959d1ed86d8a..a6f0bdb70345 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -105,9 +105,9 @@ flush_dcache: /* * Go setup Memory and board specific bits prior to relocation. */
mov ip, lr /* perserve link reg across call */
mov r4, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
mov lr, r4 /* restore link */#endif mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
Applied to u-boot-imx, thanks !
I think this might be causing me a problem on a Marvell Kirkwood board
I'm
working on getting into upstream. It may also be problematic for orion5x boards. Both of these use r4 in lowlevel_init.
I've just sent an untested patch for orion5x.
Thanks for that.