On Thursday, December 17, 2015 at 05:15:46 PM, Tim Harvey wrote:
On Thu, Dec 17, 2015 at 7:40 AM, Marek Vasut marex@denx.de wrote:
On Thursday, December 17, 2015 at 04:36:20 PM, Tim Harvey wrote:
On Wed, Dec 16, 2015 at 6:40 AM, Marek Vasut marex@denx.de wrote:
Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability.
Signed-off-by: Marek Vasut marex@denx.de Cc: Stefano Babic sbabic@denx.de
Marek,
This is great - this would be a great addition to U-Boot IMX6 SPL.
You must have forgotten to post a dependent patch that adds some of the registers to mmdc_p_regs. If you can post that I can run this through some testing.
What exactly is missing please ? I am using this on Novena for a while without issues.
sorry my bad... forgot I was on an old branch. All is good.
I will run some boards with this through some stress testing and review.
Whew! OKi, thanks!
Best regards, Marek Vasut