[U-Boot] [PATCH] PPC4xx: Reduce NAND TLB window size on Canyonlands

16MiB NAND TLB window is way too big. Reduce it to 1KiB.

Signed-off-by: Felix Radensky felix@embedded-sol.com --- board/amcc/canyonlands/init.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S index 680feaa..8b7bfce 100644 --- a/board/amcc/canyonlands/init.S +++ b/board/amcc/canyonlands/init.S @@ -80,7 +80,7 @@ tlbtab:

#if !defined(CONFIG_ARCHES) /* TLB-entry for NAND */ - tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG) + tlbentry(CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)

/* TLB-entry for CPLD */ tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_RW | SA_IG)