Hi,
On 02/22/2018 09:17 PM, Vipul Kumar wrote:
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ and enabled it in respective defconfig.
Signed-off-by: Vipul Kumar vipulk@xilinx.com Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
configs/xilinx_zynqmp_ep_defconfig | 1 + drivers/mmc/Kconfig | 7 +++++++ drivers/mmc/zynq_sdhci.c | 4 ---- include/configs/xilinx_zynqmp_ep.h | 1 - 4 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 00db5e3..4de1ac1 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -62,6 +62,7 @@ CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_ZYNQ_SDHCI_MIN_FREQ=101562
It seems that 101562 is the shifted value. If ZYNQ_SDHCI_MIN_REQ is set to 100KHz, what happen?
Best Regards, Jaehoon Chung
CONFIG_NAND=y CONFIG_NAND_ARASAN=y CONFIG_SPI_FLASH=y diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 42b7d21..4f2993c 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -478,6 +478,13 @@ config ZYNQ_SDHCI_MAX_FREQ help Set the maximum frequency for the SDHCI controller.
+config ZYNQ_SDHCI_MIN_FREQ
int "Set the minimum frequencyof the controller"depends on MMC_SDHCI_ZYNQdefault 0helpSet the minimum frequencyof the controller.config MMC_SUNXI bool "Allwinner sunxi SD/MMC Host Controller support" depends on ARCH_SUNXI && !UART0_PORT_F diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 0fddb42..414778c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -16,10 +16,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ -# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0 -#endif
struct arasan_sdhci_plat { struct mmc_config cfg; struct mmc mmc; diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index a77eeea..a26377a 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -13,7 +13,6 @@ #ifndef __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H
-#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9) #define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ ZYNQMP_USB1_XHCI_BASEADDR} -- 2.7.4
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