The I2Cx resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See chin.liang.see@intel.com Cc: Dinh Nguyen dinguyen@kernel.org Cc: Ley Foon Tan ley.foon.tan@intel.com --- arch/arm/dts/socfpga_arria10.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index f5f1b8db9b..05425a03fc 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -550,6 +550,8 @@ reg = <0xffc02200 0x100>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C0_RESET>; + reset-names = "i2c"; status = "disabled"; };
@@ -560,6 +562,8 @@ reg = <0xffc02300 0x100>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C1_RESET>; + reset-names = "i2c"; status = "disabled"; };
@@ -570,6 +574,8 @@ reg = <0xffc02400 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C2_RESET>; + reset-names = "i2c"; status = "disabled"; };
@@ -580,6 +586,8 @@ reg = <0xffc02500 0x100>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C3_RESET>; + reset-names = "i2c"; status = "disabled"; };
@@ -590,6 +598,8 @@ reg = <0xffc02600 0x100>; interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C4_RESET>; + reset-names = "i2c"; status = "disabled"; };