This series adds OPP_LOW spec data in k3_avs driver and enables a config option to select the OPP_LOW performance point.
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance Points as per (7.5 Operating Performance Points) section in the Datasheet [0]. - A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM. - A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW voltage (though OPP_LOW voltage is recommended to reduce power consumption).
The actual OPP voltage for the device is read from the efuse and updated in k3_avs_probe().
The default j7200 devicetree and k3_avs driver set OPP_NOM spec frequency and voltage.
In the board init file, if K3_OPP_LOW config is enabled, Check if OPP_LOW AVS voltage read from efuse is valid and update frequency (A72 and MSMC) and voltage (VDD_CPU) as per the OPP_LOW spec.
[0]: https://www.ti.com/lit/gpn/dra821u (J7200 Datasheet)
Test logs: https://gist.github.com/aniket-l/328ad93ed60c2419ed7be9f85e6b6075 - With series applied on master and CONFIG_K3_OPP_LOW enabled in j7200_evm_r5_defconfig - Logs shown with and without efuse register programmed for OPP_0 (Errors out if OPP_0 not found, programs OPP_LOW spec if found) - Voltage update verified using 'i2c md 0x4c 0xe' in u-boot - Frequency update verified using 'k3conf clock dump' in linux
--- v4: * Manorit - Update function name to k3_avs_check_opp and update description - Move Kconfig definition to arch/arm/mach-k3/r5/Kconfig
- Update commit messages - Fixup patch styling problems - In previous versions, fdt_fixup_a72ss_clock_frequency() assumed a fixed order of assigned-clock-rates in the DT to update clk freqs. This may not always be a valid assumption. So, add a new function get_clock_index_by_dev_id() to search the indices for A72 CPU and MSMC clk IDs and then use that index to update the clock rates in place. - Link to v3: https://lore.kernel.org/u-boot/20241116071615.839623-1-a-limaye@ti.com/
v3: * Manorit - Use more descriptive name for fdt_fixup_a72ss_clock_frequency() and make function static. - Move error prints (with error codes) before else conditions. Helps with code readability to map error print with the function. - Remove k3_avs_set_opp() from board_init_f altogether. Reasoning being that the value being set through k3_avs_set_opp() will anyway be (correctly) overridden by the k3_avs_notify_freq() call later in the boot process, when a72 freq is actually set from clk_k3.
- Add msmc clock at the end to preserve current ordering of core and gtc clocks - Add Kconfig dependency on K3_AVS0 and Update commit msg to make it more clear
- Link to v2: https://lore.kernel.org/u-boot/20241023130033.1826413-1-a-limaye@ti.com/
v2: * Neha - Fix indentation - Updates to commit msgs
- Re-format patches 3/5 and 4/5 with logical changes in each patch
- Link to v1: https://lore.kernel.org/u-boot/20241017062911.2241167-1-a-limaye@ti.com/
Reid Tonking (5): arm: dts: k3-j7200-r5-common: Add msmc clk to a72 node misc: k3_avs: Add OPP_LOW voltage and frequency to vd_data misc: k3_avs: Check validity of efuse voltage data arm: mach-k3: j721e-init.c: Add support for CONFIG_K3_OPP_LOW configs: j7200_evm_r5_defconfig: Define K3_OPP_LOW
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 10 ++--- arch/arm/mach-k3/Kconfig | 7 ++++ arch/arm/mach-k3/j721e/j721e_init.c | 41 ++++++++++++++++++- configs/j7200_evm_r5_defconfig | 1 + drivers/misc/k3_avs.c | 34 +++++++++++++++ include/k3-avs.h | 2 + 6 files changed, 89 insertions(+), 6 deletions(-)