Hi Cyril,
On Fri, Nov 27, 2020 at 9:47 PM Cyril.Jean@microchip.com wrote:
Hi Padmarao,
On 11/27/20 12:04 PM, Padmarao Begari wrote:
This patch set adds Microchip PolarFire SoC Icicle Kit support to RISC-V U-Boot.
The patches are based upon latest U-Boot tree (https://gitlab.denx.de/u-boot/u-boot.git) at commit id 7889951d0f56eab746a7c8fde350a022ba0361ca
All drivers namely: NS16550 Serial, Microchip clock, Cadence eMMC and Cadence MACB Ethernet work fine on actual Microchip PolarFire SoC Icicle Kit.
Changes in v4:
- Add dual-license GPL or MIT in the device tree
- Replace microsemi compatible strings with microchip
- Add MACB compatible string for Microchip PolarFire SoC ethernet
- Update MACB driver for 32-bit/64-bit DMA based on compatible string
Changes in v3:
- Add 'default y if 64BIT' for config DMA_ADDR_T_64BIT
- Update MACB driver for 32-bit/64-bit DMA based on design config
register
- Add phy-handle in MACB driver to read the phy address from device tree
- Fix checkpatch warnings in the clock driver
- Remove fu540 related compatible strings from soc device tree node
- Move refclk device tree node under /soc device tree node
- Use local-mac-address instead of mac-address in the device tree
- Rename device tree to microchip-mpfs-icicle-kit.dts
- Add U-Boot specific dts microchip-mpfs-icicle-kit-u-boot.dtsi file
- Drop the imply DMA_ADDR_T_64BIT from board config
- Fix some typos
- Update doc with Microchip and Custom boot-flow
Changes in v2:
- Add clock frequency for the clint device tree node
- Move peripheral device tree nodes under /soc device tree node
- Device tree nodes are in order based on the address
- Enable UART0 for U-Boot logs
- Update doc for the U-Boot logs are on UART0
- Move clock and reset index source into patch4
- Remove "dma_addr_r" type in the macb driver
- Add lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7): riscv: Add DMA 64-bit address support net: macb: Add DMA 64-bit address support for macb net: macb: Add phy address to read it from device tree clk: Add Microchip PolarFire SoC clock driver riscv: dts: Add device tree for Microchip Icicle Kit riscv: Add Microchip MPFS Icicle Kit support doc: board: Add Microchip MPFS Icicle Kit doc
arch/riscv/Kconfig | 4 + arch/riscv/dts/Makefile | 1 + .../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 + arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421 +++++++++ arch/riscv/include/asm/types.h | 4 + board/microchip/mpfs_icicle/Kconfig | 24 + board/microchip/mpfs_icicle/mpfs_icicle.c | 97 +- configs/microchip_mpfs_icicle_defconfig | 9 +- doc/board/index.rst | 1 + doc/board/microchip/index.rst | 9 + doc/board/microchip/mpfs_icicle.rst | 827 ++++++++++++++++++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/microchip/Kconfig | 5 + drivers/clk/microchip/Makefile | 1 + drivers/clk/microchip/clk_pfsoc.c | 127 +++ drivers/clk/microchip/clk_pfsoc.h | 19 + drivers/clk/microchip/clk_pfsoc_cfg.c | 134 +++ drivers/clk/microchip/clk_pfsoc_periph.c | 173 ++++ drivers/net/macb.c | 144 ++- drivers/net/macb.h | 6 + include/configs/microchip_mpfs_icicle.h | 60 +- .../dt-bindings/clock/microchip,pfsoc-clock.h | 45 + 23 files changed, 2065 insertions(+), 62 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts create mode 100644 doc/board/microchip/index.rst create mode 100644 doc/board/microchip/mpfs_icicle.rst create mode 100644 drivers/clk/microchip/Kconfig create mode 100644 drivers/clk/microchip/Makefile create mode 100644 drivers/clk/microchip/clk_pfsoc.c create mode 100644 drivers/clk/microchip/clk_pfsoc.h create mode 100644 drivers/clk/microchip/clk_pfsoc_cfg.c create mode 100644 drivers/clk/microchip/clk_pfsoc_periph.c create mode 100644 include/dt-bindings/clock/microchip,pfsoc-clock.h
Can you please rename the files clk_pfsoc_* to mpfs_clk_*? I know this naming is inconsistent but we need to start somewhere. Also pfsoc-clock.h to mpfs-clock.h.
Ok
Regards Padmarao
Regards,
Cyril.