Travis:
The Marvell 88E1111 PHYs work at 100M without changing the miiphy_speed function. Of course the extended registers are different and a wack of register 0x14 is needed for the correct RGMII settings for the 440GX. I used the mii command for the wack and have not changed u-boot. I did not persue 1000M because my TFTP server runs at 100M.
The Marvell PHYs must have the correct hard reset waveform to function correctly. You may want to check the hardware reset waveform for the CIS8201 PHY and then check the IEEE register status for proper indications.
Carl
--- Travis Sawyer tsawyer+u-boot@sandburst.com wrote:
On Thu, 2004-03-11 at 11:02, Wolfgang Denk wrote:
In message
1079020123.17587.135.camel@pavement.sandburst.com you wrote:
Is anyone working on Gigabit Ethernet PHY
support for u-boot?
What _exactly_ are you looking for?
The IBM 440GX supports GbE on the 2nd and 3rd ports, if a gigabit capable phy is in place that is.
The current miiphy_utils (specifically miiphy_speed and miiphy_duplex) read the phy autonegiotation link partner ability register (reg 0x05) to determine current link speed and duplex.
Register 5 is a standard IEEE802.3 register. However, in order to get 'true' status (10/100/1000), extended registers are needed.
In the case of the ocotea board, IBM placed a LXT9762 (6 port phy) for emac 0 and 1 (as they only support 10/100), and two (2) cicada CIS8201 phys for emac 2 and 3 (supports 10/100/1000).
The problem I see is that the extended register set may not be the same across the phy part spectrum. So, one would need to check the OUI and then go to the appropriate register for that part. Which, IMHO, would add quite a bit of code.
Perhaps for my application I should force 1000 Gbps off in the autonegotiation register...
-travis
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