Hi Bin,
On 29 January 2015 at 02:18, Bin Meng bmeng.cn@gmail.com wrote:
Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is initialized by hardware. eSRAM is the ideal place to be used for Cache-As-RAM (CAR) before system memory is available.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2:
- Replace upper case register names (EAX etc.) with lower case
- Use some macros from <asm/arch/msg_port.h> and <asm/arch/quark.h>
arch/x86/cpu/quark/car.S | 104 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 arch/x86/cpu/quark/car.S
diff --git a/arch/x86/cpu/quark/car.S b/arch/x86/cpu/quark/car.S new file mode 100644 index 0000000..f32f9b1 --- /dev/null +++ b/arch/x86/cpu/quark/car.S @@ -0,0 +1,104 @@ +/*
- Copyright (C) 2015, Bin Meng bmeng.cn@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <config.h> +#include <asm/post.h> +#include <asm/arch/quark.h> +#include <asm/arch/msg_port.h>
+.globl car_init +car_init:
post_code(POST_CAR_START)/** Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is* initialized by hardware. eSRAM is the ideal place to be used* for Cache-As-RAM (CAR) before system memory is available.** Relocate this eSRAM to a suitable location in the physical* memory map and enable it.*//* Host Memory Bound Register P03h:R08h */mov $((0x03 << 16) | (0x08 << 8)), %eax
Do you have #defines for these to?
mov $(DRAM_BASE + DRAM_MAX_SIZE + ESRAM_SIZE), %edxlea 1f, %espjmp msg_port_write+1:
/* eSRAM Block Page Control Register P05h:R82h */mov $((0x05 << 16) | (0x82 << 8)), %eaxmov $(ESRAM_BLOCK_MODE | (CONFIG_ESRAM_BASE >> 24)), %edxlea 2f, %espjmp msg_port_write+2:
post_code(POST_CAR_CPU_CACHE)jmp car_init_ret+msg_port_read:
/** Parameter:* eax[23:16] - Message Port ID* eax[15:08] - Register Address** Return Value:* eax - Message Port Register value** Return Address: esp*/or $((MSG_OP_READ << 24) | MSG_BYTE_ENABLE), %eaxmov %eax, %ebx/* Write MCR B0:D0:F0:RD0 */mov $((1 << 31) | MSG_CTRL_REG), %eax
And this 1 << 31 ?
mov $0xcf8, %dxout %eax, %dxmov $0xcfc, %dxmov %ebx, %eaxout %eax, %dx/* Read MDR B0:D0:F0:RD4 */mov $((1 << 31) | MSG_DATA_REG), %eaxmov $0xcf8, %dxout %eax, %dxmov $0xcfc, %dxin %dx, %eaxjmp *%esp+msg_port_write:
/** Parameter:* eax[23:16] - Message Port ID* eax[15:08] - Register Address* edx - Message Port Register value to write** Return Address: esp*/or $((MSG_OP_WRITE << 24) | MSG_BYTE_ENABLE), %eaxmov %eax, %esimov %edx, %edi/* Write MDR B0:D0:F0:RD4 */mov $((1 << 31) | MSG_DATA_REG), %eaxmov $0xcf8, %dxout %eax, %dxmov $0xcfc, %dxmov %edi, %eaxout %eax, %dx/* Write MCR B0:D0:F0:RD0 */mov $((1 << 31) | MSG_CTRL_REG), %eaxmov $0xcf8, %dxout %eax, %dxmov $0xcfc, %dxmov %esi, %eaxout %eax, %dxjmp *%esp-- 1.8.2.1
Regards, Simon