From: Lad, Prabhakar prabhakar.lad@ti.com
This patch adds support for NAND SPL on DA850/OMAP-L138.
Signed-off-by: Lad, Prabhakar prabhakar.lad@ti.com Signed-off-by: Rajashekhara, Sudhakar sudhakar.raj@ti.com Signed-off-by: Hadli, Manjunath manjunath.hadli@ti.com --- Changes for v2: 1:Added a check to perform initializations of serial console only if CONFIG_SPL_LIBCOMMON_SUPPORT is defined.
arch/arm/cpu/arm926ejs/davinci/spl.c | 15 +++++++----- include/configs/da850evm.h | 39 +++++++++++++++++++++++++++++---- 2 files changed, 43 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/cpu/arm926ejs/davinci/spl.c index be397ce..c7f2bfa 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c @@ -79,12 +79,7 @@ void board_init_f(ulong dummy)
void board_init_r(gd_t *id, ulong dummy) { -#ifdef CONFIG_SPL_NAND_LOAD - nand_init(); - puts("Nand boot...\n"); - nand_boot(); -#endif -#ifdef CONFIG_SPL_SPI_LOAD +#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN);
@@ -94,7 +89,15 @@ void board_init_r(gd_t *id, ulong dummy) gd->baudrate = CONFIG_BAUDRATE; serial_init(); /* serial communications setup */ gd->have_console = 1; +#endif
+#ifdef CONFIG_SPL_NAND_LOAD + puts("Nand boot...\n"); + nand_init(); + puts("Nand Initalized...\n"); + nand_boot(); +#endif +#ifdef CONFIG_SPL_SPI_LOAD puts("SPI boot...\n"); #ifdef CONFIG_SPL_MMC_LOAD spl_mmc_load(); diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 8236c90..c0b9077 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -183,6 +183,32 @@ #define CONFIG_SYS_ALE_MASK 0x8 #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 +#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ + CONFIG_SYS_NAND_U_BOOT_SIZE - \ + CONFIG_SYS_MALLOC_LEN - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { \ + 24, 25, 26, 27, 28, \ + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ + 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ + 59, 60, 61, 62, 63 } +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_LOAD #endif
/* @@ -340,13 +366,18 @@ #define CONFIG_CMD_MMC #endif
-/* defines for SPL */ -#define CONFIG_SPL +#ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 +#endif + +/* defines for SPL */ +#define CONFIG_SPL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -354,11 +385,9 @@ #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_SIZE 32768 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 - /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */