This macro only served as a wrapper for CKSEG1ADDR() with an exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus use CKSEG1ADDR() directly.
This also prepares for an upcoming asm header sync with Linux.
Signed-off-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com ---
arch/mips/include/asm/addrspace.h | 13 ------------- arch/mips/lib/bootm.c | 4 ++-- 2 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h index b6d387677e..ae6f586f00 100644 --- a/arch/mips/include/asm/addrspace.h +++ b/arch/mips/include/asm/addrspace.h @@ -126,19 +126,6 @@ #define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \ (_CONST64_(cm) << 59) | (a))
-/* - * Returns the uncached address of a sdram address - */ -#ifndef __ASSEMBLY__ -#if defined(CONFIG_TB0229) -/* We use a 36 bit physical address map here and - cannot access physical memory directly from core */ -#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) -#else /* !CONFIG_TB0229 */ -#define UNCACHED_SDRAM(a) CKSEG1ADDR(a) -#endif /* CONFIG_TB0229 */ -#endif /* __ASSEMBLY__ */ - /* * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting * the region, 3 bits for the CCA mode. This leaves 59 bits of which the diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index 82f986cb81..0a13f6edb7 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -51,7 +51,7 @@ void arch_lmb_reserve(struct lmb *lmb) static void linux_cmdline_init(void) { linux_argc = 1; - linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params); + linux_argv = (char **)CKSEG1ADDR(gd->bd->bi_boot_params); linux_argv[0] = 0; linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS); } @@ -186,7 +186,7 @@ static void linux_env_legacy(bootm_headers_t *images) (ulong)(gd->ram_size >> 20)); }
- rd_start = UNCACHED_SDRAM(images->initrd_start); + rd_start = CKSEG1ADDR(images->initrd_start); rd_size = images->initrd_end - images->initrd_start;
linux_env_init();