Wolfgang Denk wrote:
In message 367ED8C46538D7119DAC000A0D106744520D6E@elmegmbh.elmedmn.com you wrote:
is there a reason why the clock divisor in the baudrate generator register (us->US_BRGR) is set to a fixed value in serial_setbrg(void):
us->US_BRGR = CFG_AT91C_BRGR_DIVISOR
I changed the implementation of serial_setbrg(void) and i can now opperate at higher baudrates. (change baudrate with loadb).
I have never seen any feedback or comments about this proposal.
Anybody out there?
I introduced this since it was originally hardcoded to
us->US_BRGR = 33
for the AT91RM9200DK. The comment says "hardcode so no __divsi3". I decdided that having a CFG_AT91C_BRGR_DIVISOR in your board specific header file would be enough.
I had no time to test Peter's patch yet. But go ahead and apply it. If I find problems I'll report them...