Hi All,

 

I am working on ARM1176 CPU, and using ARM-1.2.0.

Can anyone tell me how Cache is configured in UBoot code, Cache Policy for both I and D Cache?

 

If UBoot is configuring the cache then which cache policy(write back Or write through) is bein used, and where is that present in code?

If you look at the file cmd_cache.c, the in printf statement of data cache function the write through policy is hardcoded, why is this so? Since this is independent of CPU we are using.

 

Again, as per ARM1176 Arch referance manal(page no. ), the cache type register in system control coprocessor  say's cache works in write back mode.

 

can anyone help me our in this?

 

Thanks,

Vaibhav