22 Jul
2023
22 Jul
'23
1:35 a.m.
On Mon, Jul 17, 2023 at 05:15:26PM -0500, Bryan Brattlof wrote:
During LPDDR initialization we will loop through a series of frequency changes in order to train at the various operating frequencies. During this training, accessing the DRAM_CLASS bitfield could happen during a frequency change and cause the read to hang.
Store the DRAM type into the main structure to avoid multiple readings while the independent phy is training.
Signed-off-by: Bryan Brattlof bb@ti.com
Applied to u-boot/master, thanks!
--
Tom