[U-Boot] [PATCH 16/19] ARM: zynq: DT: Add missing interrupt for L2 pl310

Add pl310 interrupt to the Zynq devicetree.

Signed-off-by: Alex Wilson alex.david.wilson@gmail.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---

arch/arm/dts/zynq-7000.dtsi | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 095c0f67e167..0b62cb093658 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -135,6 +135,7 @@ L2: cache-controller@f8f02000 { compatible = "arm,pl310-cache"; reg = <0xF8F02000 0x1000>; + interrupts = <0 2 4>; arm,data-latency = <3 2 2>; arm,tag-latency = <2 2 2>; cache-unified;