This short series cleans up the MIPS cache code in preparation for introducing support for L2 cache support. It's hopefully a useful standalone cleanup as-is, so I'll submit it now.
Paul Burton (3): MIPS: Move cache sizes to Kconfig MIPS: Split I & D cache line size config MIPS: Abstract cache op loops with a macro
arch/mips/Kconfig | 16 ++++++++ arch/mips/lib/cache.c | 79 ++++++++++++---------------------------- arch/mips/lib/cache_init.S | 10 ++--- board/dbau1x00/Kconfig | 12 ++++++ board/micronas/vct/Kconfig | 12 ++++++ board/pb1x00/Kconfig | 12 ++++++ board/qca/ap121/Kconfig | 12 ++++++ board/qca/ap143/Kconfig | 12 ++++++ board/qemu-mips/Kconfig | 12 ++++++ board/tplink/wdr4300/Kconfig | 12 ++++++ include/configs/ap121.h | 5 --- include/configs/ap143.h | 5 --- include/configs/dbau1x00.h | 7 ---- include/configs/pb1x00.h | 6 --- include/configs/qemu-mips.h | 7 ---- include/configs/qemu-mips64.h | 7 ---- include/configs/tplink_wdr4300.h | 5 --- include/configs/vct.h | 7 ---- 18 files changed, 129 insertions(+), 109 deletions(-)