In message 4B55BA83.4050505@ge.com Jerry Van Baren wrote:
What I find is *VERY* helpful when trying to understand flash control issues is to *manually* do the QRY write sequence (see your flash data sheet) by using memory write/read commands from the u-boot command prompt. This way I can quickly try different byte widths, lanes, etc. for the writes and see the full QRY response from the memory. Usually
Right.
the problem is a simple misunderstanding of how the chip is configured or the hardware is wired (beware of hardware designers doing "endian fixes").
Another pretty popular trick of the hardware guys is to connect pin 0 of the data bus of the flash to pin 0 of the processor data bus, pin 1 to pin 1 etc. This gives a nice 1:1 mapping, but unfortunately not a working system. But you should notice this already when trying to flash you image with the JTAG probe.
Best regards,
Wolfgang Denk