-----Original Message----- From: Marek Vasut marex@denx.de Sent: Wednesday, April 15, 2020 8:44 PM To: Tan, Ley Foon ley.foon.tan@intel.com; u-boot@lists.denx.de Cc: Ley Foon Tan lftan.linux@gmail.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Chee, Tien Fong tien.fong.chee@intel.com Subject: Re: [PATCH 5/7] ddr: altera: arria10: Add RAM size check
On 4/15/20 11:00 AM, Ley Foon Tan wrote:
Add call to get_ram_size() function to check memory range for valid RAM.
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
drivers/ddr/altera/sdram_arria10.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 6b74423ea789..e3f11984a978 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -8,6 +8,7 @@ #include <dm.h> #include <errno.h> #include <fdtdec.h> +#include <hang.h> #include <malloc.h> #include <ram.h> #include <reset.h> @@ -17,7 +18,7 @@ #include <asm/arch/fpga_manager.h> #include <asm/arch/misc.h> #include <dm/device_compat.h> -#include <linux/kernel.h> +#include <linux/sizes.h>
#include "sdram_arria10.h"
@@ -671,6 +672,27 @@ static int ddr_calibration_sequence(struct
altera_sdram_platdata *plat)
return 0; }
+static void sdram_size_check(struct ram_info *ram) {
- phys_size_t ram_check = 0;
- phys_size_t size = ram->size;
- phys_addr_t base = ram->base;
- debug("DDR: Running SDRAM size sanity check\n");
- while (ram_check < size) {
ram_check += get_ram_size((void *)(base + ram_check),(phys_size_t)SZ_1G);Why is it running in 1 GiB steps ?
Don't have any special reason. I'm following S10/Agilex's implementation. Do you prefer use smaller step size?
Regards Ley Foon