The patch adds the possibility to update the QONG FPGA (a Lattice XP2-5E) with u-boot using some GPIOs to drive the JTAG interface.
Signed-off-by: Stefano Babic sbabic@denx.de --- board/davedenx/qong/Makefile | 2 +- board/davedenx/qong/fpga.c | 95 +++++++++++++++++++++++++++++++++++++++ board/davedenx/qong/qong.c | 11 +++++ board/davedenx/qong/qong_fpga.h | 3 +- include/configs/qong.h | 3 + 5 files changed, 111 insertions(+), 3 deletions(-) create mode 100644 board/davedenx/qong/fpga.c
diff --git a/board/davedenx/qong/Makefile b/board/davedenx/qong/Makefile index 93e1985..ada6e03 100644 --- a/board/davedenx/qong/Makefile +++ b/board/davedenx/qong/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := qong.o +COBJS := qong.o fpga.o SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/davedenx/qong/fpga.c b/board/davedenx/qong/fpga.c new file mode 100644 index 0000000..f865eb4 --- /dev/null +++ b/board/davedenx/qong/fpga.c @@ -0,0 +1,95 @@ +/* + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/mx31.h> +#include <asm/arch/mx31-regs.h> +#include <mxc_gpio.h> +#include <fpga.h> +#include <lattice.h> +#include "qong_fpga.h" + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_FPGA) + +static void qong_jtag_init(void) +{ + return; +} + +static void qong_fpga_jtag_set_tdi(int value) +{ + mxc_gpio_set(QONG_FPGA_TDI_PIN, value); +} + +static void qong_fpga_jtag_set_tms(int value) +{ + mxc_gpio_set(QONG_FPGA_TMS_PIN, value); +} + +static void qong_fpga_jtag_set_tck(int value) +{ + mxc_gpio_set(QONG_FPGA_TCK_PIN, value); +} + +static int qong_fpga_jtag_get_tdo(void) +{ + return mxc_gpio_get(QONG_FPGA_TDO_PIN); +} + +lattice_board_specific_func qong_fpga_fns = { + qong_jtag_init, + qong_fpga_jtag_set_tdi, + qong_fpga_jtag_set_tms, + qong_fpga_jtag_set_tck, + qong_fpga_jtag_get_tdo +}; + +Lattice_desc qong_fpga[CONFIG_FPGA_COUNT] = { + { + Lattice_XP2, + lattice_jtag_mode, + 356519, + (void *) &qong_fpga_fns, + NULL, + 0, + "lfxp2_5e_ftbga256" + }, +}; + +int qong_fpga_init(void) +{ + int i; + + fpga_init(); + + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + fpga_add(fpga_lattice, &qong_fpga[i]); + } + return 0; +} + +#endif + diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 9abc29c..efeb0bb 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -73,6 +73,15 @@ int board_early_init_f (void) /* set interrupt pin as input */ mxc_gpio_direction(QONG_FPGA_IRQ_PIN, MXC_GPIO_DIRECTION_IN);
+ /* FPGA JTAG Interface */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS6, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK6, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CAPTURE, MUX_CTL_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_COMPARE, MUX_CTL_GPIO)); + mxc_gpio_direction(QONG_FPGA_TCK_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TMS_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TDI_PIN, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(QONG_FPGA_TDO_PIN, MXC_GPIO_DIRECTION_IN); #endif
/* setup pins for UART1 */ @@ -146,6 +155,8 @@ int board_init (void) gd->bd->bi_arch_number = MACH_TYPE_QONG; gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
+ qong_fpga_init(); + return 0; }
diff --git a/board/davedenx/qong/qong_fpga.h b/board/davedenx/qong/qong_fpga.h index 4e11f5a..4e79ac2 100644 --- a/board/davedenx/qong/qong_fpga.h +++ b/board/davedenx/qong/qong_fpga.h @@ -24,7 +24,6 @@ #ifndef QONG_FPGA_H #define QONG_FPGA_H
-#ifdef CONFIG_QONG_FPGA #define QONG_FPGA_CTRL_BASE CONFIG_FPGA_BASE #define QONG_FPGA_CTRL_VERSION (QONG_FPGA_CTRL_BASE + 0x00000000) #define QONG_FPGA_PERIPH_SIZE (1 << 24) @@ -35,6 +34,6 @@ #define QONG_FPGA_TDO_PIN 7 #define QONG_FPGA_RST_PIN 48 #define QONG_FPGA_IRQ_PIN 40 -#endif
+int qong_fpga_init(void); #endif /* QONG_FPGA_H */ diff --git a/include/configs/qong.h b/include/configs/qong.h index 7cd9558..2d124ea 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -66,8 +66,11 @@ #define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
/* FPGA */ +#define CONFIG_FPGA #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) +#define CONFIG_FPGA_LATTICE +#define CONFIG_FPGA_COUNT 1
#ifdef CONFIG_QONG_FPGA /* Ethernet */