In some NAND controllers there is a size limitation of RAM buffer(2K bytes). To support large-page NAND chips with greater than 2K pagesize, we need a large buffer, but we don't know pagesize before calling nand_scan_ident(), for more flexible and to identify different cases of large-page greater than 2K bytes, we have a board_nand_init_tail() between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com --- drivers/mtd/nand/nand.c | 14 +++++++++++++- 1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index d987f4c..2bafe47 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -39,6 +39,13 @@ static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIS static const char default_nand_name[] = "nand"; static __attribute__((unused)) char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8];
+int __board_nand_init_tail(struct mtd_info *mtd, struct nand_chip *nand) +{ + /* Allow for init at tail in controller-specific file for some reason */ +} +void board_nand_init_tail(struct mtd_info *mtd, struct nand_chip *nand) +__attribute__((weak, alias("__board_nand_init_tail"))); + static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand, ulong base_addr) { @@ -51,7 +58,12 @@ static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand,
nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr; if (board_nand_init(nand) == 0) { - if (nand_scan(mtd, maxchips) == 0) { + if (!nand_scan_ident(mtd, maxchips, NULL)) { + board_nand_init_tail(mtd, nand); + if (nand_scan_tail(mtd)) { + mtd->name = NULL; + return; + } if (!mtd->name) mtd->name = (char *)default_nand_name; #ifdef CONFIG_NEEDS_MANUAL_RELOC