On Thu, Sep 30, 2021 at 7:53 AM tkuw584924@gmail.com wrote:
From: Takahiro Kuwano Takahiro.Kuwano@infineon.com
The S25FL256L is a part of the S25FL-L family and has the same feature set as S25FL128L except the density.
The datasheet can be found in the following link. https://www.cypress.com/file/316171/download
The S25FL256L is 32MB NOR Flash that does not support Bank Address Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and returns ENOTSUPP in setup() hook to avoid further ops.
Tested on Xilinx Zynq-7000 FPGA board.
Signed-off-by: Takahiro Kuwano Takahiro.Kuwano@infineon.com
Changes in v2:
- Merge separated patches into one
- Remove #ifdef CONFIG_SPI_FLASH_BAR
drivers/mtd/spi/spi-nor-core.c | 19 +++++++++++++++++++ drivers/mtd/spi/spi-nor-ids.c | 1 + 2 files changed, 20 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f1b4e5ea8e..7572be5e34 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3224,6 +3224,21 @@ static struct spi_nor_fixups s25hx_t_fixups = { .post_bfpt = s25hx_t_post_bfpt_fixup, .post_sfdp = s25hx_t_post_sfdp_fixup, };
+static int s25fl256l_setup(struct spi_nor *nor, const struct flash_info *info,
const struct spi_nor_flash_parameter *params)+{
return -ENOTSUPP; /* Bank Address Register is not supported */+}
+static void s25fl256l_default_init(struct spi_nor *nor) +{
nor->setup = s25fl256l_setup;+}
+static struct spi_nor_fixups s25fl256l_fixups = {
.default_init = s25fl256l_default_init,+}; #endif
#ifdef CONFIG_SPI_FLASH_S28HS512T @@ -3646,6 +3661,10 @@ void spi_nor_set_fixups(struct spi_nor *nor) break; } }
if (CONFIG_IS_ENABLED(SPI_FLASH_BAR) &&!strcmp(nor->info->name, "s25fl256l"))nor->fixups = &s25fl256l_fixups;#endif
This look we have fixups for individual parts, better use default fixup and handle it based on the part specific ID.
Jagan.