From: Dinh Nguyen dinguyen@opensource.altera.com
commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration" incorrectly set the muxing for UART0 on the Cyclone V DK.
This fixes it up so UART0 is working again.
Signed-off-by: Dinh Nguyen dinguyen@opensource.altera.com --- board/altera/socfpga/pinmux_config.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/altera/socfpga/pinmux_config.c b/board/altera/socfpga/pinmux_config.c index 61cdc73..7e7a184 100644 --- a/board/altera/socfpga/pinmux_config.c +++ b/board/altera/socfpga/pinmux_config.c @@ -54,8 +54,8 @@ unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = { 2, /* GENERALIO14 */ 0, /* GENERALIO15 */ 0, /* GENERALIO16 */ - 0, /* GENERALIO17 */ - 0, /* GENERALIO18 */ + 2, /* GENERALIO17 */ + 2, /* GENERALIO18 */ 0, /* GENERALIO19 */ 0, /* GENERALIO20 */ 0, /* GENERALIO21 */