4 Jun
2005
4 Jun
'05
10:39 p.m.
In message <r02010500-1041-E8859113D52E11D9ABA900039387ACB6@[10.0.1.1]> you wrote:
Changing from:
....
volatile IP_t *ip; volatile ushort *s;....
to:
....
IP_t *ip; ushort *s;....
Solved the ping problem (o;
Masked, not solved. Broken toolchain ?
What I thought as well...think it is the ARCtangent A4 CPU which behaves abnormal when using load/store instruction bypassing cache on SDRAM...
It generates correctly stb.di/stw.di instruction with "volatile" keyword...which are needed and work for periphals like on-chip UART...
best regards rick