Hi All,
I am using MPC8640 based custom board in which we have IDT pcie switch( 32-Lane 8 Port PCIe Switch “89HPES32H8G2”).Upstream port of the switch is connected to the mpc8640 and all the downstream ports are connected to respective endpoints. MPC8640 is configured as root complex.
During the PCIe enumeration i am able to detect 7 ports of the switch and not beyond that . As per the switch datasheet the primary bus number should be different from secondary bus number. For example, if the primary bus number on Port0 is set to 0x00 then the secondary bus number should be set to 0x01 or higher. But after the enumeration the primary/secondary/subordinate bus number (at offset 0x018) were not assigned properly.The primary and secondary bus number assignments after the enumeration as follows.
primary/secondary/subordinate Port0 = 00/00/06 Port1 = 00/01/01 Port2 = disable Port3 = 00/02/02 Port4 = 00/03/03 Port5 = 00/04/04 Port6 = 00/05/05 Port7 = 00/06/06 Port7 = 00/07/07
Also we found that There are overlap between the Memory Base Register and Memory Limit Register setting (at offset 0x20-0x22) among the downstream ports,while each downstream ports should have unique Memory Base address. There are overlap between the I/O Base Register and I/O Limit Register setting (at offset 0x30-0x32) among the downstream ports.while each downstream ports should have unique I/O Base address.
Please find the pcie configuration space dump from u-boot after the enumeration
Node0:=> pci display 0 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00060000 00000111 00000020: 40100000 60010d21 ffffffff 00000000 00000030: 60016000 00000040 00000000 00000000 00000040: 0052c010 003c8024 00090000 00016c42 00000050: 00410000 00000000 00000000 00000000
Node0:=> pci display 1 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00010100 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 01396c42 00000050: 20410000 00000000 00400000 00000000
Node0:=> pci display 2 0 18
00000000: ffffffff ffffffff ffffffff ffffffff 00000010: ffffffff ffffffff ffffffff ffffffff 00000020: ffffffff ffffffff ffffffff ffffffff 00000030: ffffffff ffffffff ffffffff ffffffff 00000040: ffffffff ffffffff ffffffff ffffffff 00000050: ffffffff ffffffff ffffffff ffffffff
Node0:=> pci display 3 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00020200 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 03396c42 00000050: 20410000 00000000 00400000 00000000
Node0:=> pci display 4 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00030300 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 04396c42 00000050: 20410000 00000000 00400000 00000000
Node0:=> pci display 5 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00040400 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 05396c42 00000050: 00010000 00000000 00400000 00000000
Node0:=> pci display 6 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00050500 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 06396c42 00000050: 00010000 00000000 00400000 00000000
Node0:=> pci display 7 0 18
00000000: 8075111d 00100007 06040002 00010008 00000010: 00000000 00000000 00060600 00000111 00000020: 40104020 00011001 ffffffff 00000000 00000030: 60016001 00000040 00000000 00000000 00000040: 0062c010 00008024 00000000 07396c42 00000050: 00010000 00000000 00400000 00000000
Any idea if we are missing any inputs to pcie enumeration code or is it that u-boot doesn't support the pcie switch ?
regards Ratheesh C