Olof Johansson wrote:
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp.
Based on the omap3 evm code. I added a new highlevel define for Tobi to avoid having it dependent on CMD_NET (which would seem backward in this case).
Signed-off-by: Olof Johansson olof@lixom.net
This version of the patch fixes whitespace comments from WD, and includes fixes for the build warnings that Dirk's patch also silenced.
board/overo/overo.c | 62 +++++++++++++++++++++++++++++++++++++++++ board/overo/overo.h | 37 ++++++++++++++++++++++++ include/configs/omap3_overo.h | 23 ++++++++++++++- 3 files changed, 120 insertions(+), 2 deletions(-)
diff --git a/board/overo/overo.c b/board/overo/overo.c index dd6d286..7d87e52 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -29,13 +29,19 @@
- MA 02111-1307 USA
*/ #include <common.h> +#include <netdev.h> #include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> +#include <asm/arch/mem.h> #include <asm/arch/sys_proto.h> #include <asm/mach-types.h> #include "overo.h"
+#if defined(CONFIG_OMAP3_OVERO_TOBI) +static void setup_net_chip(void); +#endif
/*
- Routine: board_init
- Description: Early hardware init.
@@ -62,6 +68,10 @@ int misc_init_r(void) twl4030_power_init(); twl4030_led_init();
+#if defined(CONFIG_OMAP3_OVERO_TOBI)
- setup_net_chip();
+#endif
dieid_num_r();
return 0;
@@ -76,4 +86,56 @@ int misc_init_r(void) void set_muxconf_regs(void) { MUX_OVERO(); +#if defined(CONFIG_OMAP3_OVERO_TOBI)
- MUX_OVERO_TOBI();
+#endif +}
+#if defined(CONFIG_OMAP3_OVERO_TOBI) +/*
- Routine: setup_net_chip
- Description: Setting up the configuration GPMC registers specific to the
Ethernet hardware.- */
+static void setup_net_chip(void) +{
- struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
- struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
- /* Configure GPMC registers */
- writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
- writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
- writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
- writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
- writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
- writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
- writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
- /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
- writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
- /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
- writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
- /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
- writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
&ctrl_base->gpmc_nadv_ale);- /* Make GPIO 64 as output pin */
- writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
- /* Now send a pulse on the GPIO pin */
- writel(GPIO0, &gpio3_base->setdataout);
- udelay(1);
- writel(GPIO0, &gpio3_base->cleardataout);
- udelay(1);
- writel(GPIO0, &gpio3_base->setdataout);
Use the omap gpio interface described in README.omap3
Tom