On Thu, Oct 9, 2008 at 1:26 AM, Ed Swarthout Ed.Swarthout@freescale.com wrote:
This allows a second core to restart without causing a PIC reset.
Internal interupt changes: Enable L2 error interrupt IIVPR0 and give it vector 0x100. Use correct interrupt (8) for mpc8572 pcie3. Add pcie3 interrupt (11) for mpc8536ds.
Signed-off-by: Ed Swarthout Ed.Swarthout@freescale.com
Hrm. There's a notable increase in #ifdefs, here. It might be time to add some CONFIG values to make this scale for future parts. As it is, the values being written to the iivprs are awfully magical. It might also be time to define some constants for those bitfields. Whatever makes sense for making it fairly easy to see what's happening at a high level, and to extend it next time the hardware designers change the interrupt numbers on us. :)
Andy