20 Feb
2017
20 Feb
'17
7:40 a.m.
Am 19.02.2017 um 22:53 schrieb Jaehoon Chung:
Hi,
On 02/03/2017 04:03 AM, Heiner Kallweit wrote:
As a prerequisite for adding a Meson GX MMC driver update the Meson GXBB / Odroid-C2 device tree in Uboot with the latest version from Linux.
Why do you use the "mmc" as subject prefix? This patch is not for only mmc side, right?
Right. Then I'd change the prefix to "arm: dts:". Anybody else to involve as maintainer for uboot dts ?
Signed-off-by: Neil Armstrong narmstrong@baylibre.com Signed-off-by: Carlo Caione carlo@endlessm.com Signed-off-by: Andreas Färber afaerber@suse.de Signed-off-by: Heiner Kallweit hkallweit1@gmail.com
v4:
- Added SoB of original authors
arch/arm/dts/meson-gx.dtsi | 447 ++++++++++++++++++++ arch/arm/dts/meson-gxbb-odroidc2.dts | 147 ++++++- arch/arm/dts/meson-gxbb.dtsi | 718 ++++++++++++++++++++------------ include/dt-bindings/clock/gxbb-aoclkc.h | 66 +++ include/dt-bindings/clock/gxbb-clkc.h | 34 ++ include/dt-bindings/reset/gxbb-aoclkc.h | 66 +++ 6 files changed, 1203 insertions(+), 275 deletions(-) create mode 100644 arch/arm/dts/meson-gx.dtsi create mode 100644 include/dt-bindings/clock/gxbb-aoclkc.h create mode 100644 include/dt-bindings/clock/gxbb-clkc.h create mode 100644 include/dt-bindings/reset/gxbb-aoclkc.h
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi new file mode 100644 index 0000000..c129100 --- /dev/null +++ b/arch/arm/dts/meson-gx.dtsi @@ -0,0 +1,447 @@ +/*
- Copyright (c) 2016 Andreas Färber
- Copyright (c) 2016 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- Copyright (c) 2016 Endless Computers, Inc.
- Author: Carlo Caione carlo@endlessm.com
- This file is dual-licensed: you can use it either under the terms
- of the GPL or the X11 license, at your option. Note that this dual
- licensing only applies to this file, and not this project as a
- whole.
- a) This library is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
- Or, alternatively,
- b) Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use,
copy, modify, merge, publish, distribute, sublicense, and/or
sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.- */
I think you can use "SPDX-License-Identifier: <Licesnce>"
Best Regards, Jaehoon Chung
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h>
+/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
- reserved-memory {
#address-cells = <2>;#size-cells = <2>;ranges;/* 16 MiB reserved for Hardware ROM Firmware */hwrom_reserved: hwrom@0 {reg = <0x0 0x0 0x0 0x1000000>;no-map;};/* 2 MiB reserved for ARM Trusted Firmware (BL31) */secmon_reserved: secmon@10000000 {reg = <0x0 0x10000000 0x0 0x200000>;no-map;};- };
- cpus {
#address-cells = <0x2>;#size-cells = <0x0>;cpu0: cpu@0 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x0>;enable-method = "psci";next-level-cache = <&l2>;clocks = <&scpi_dvfs 0>;};cpu1: cpu@1 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x1>;enable-method = "psci";next-level-cache = <&l2>;clocks = <&scpi_dvfs 0>;};cpu2: cpu@2 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x2>;enable-method = "psci";next-level-cache = <&l2>;clocks = <&scpi_dvfs 0>;};cpu3: cpu@3 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x3>;enable-method = "psci";next-level-cache = <&l2>;clocks = <&scpi_dvfs 0>;};l2: l2-cache0 {compatible = "cache";};- };
- arm-pmu {
compatible = "arm,cortex-a53-pmu";interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;- };
- psci {
compatible = "arm,psci-0.2";method = "smc";- };
- timer {
compatible = "arm,armv8-timer";interrupts = <GIC_PPI 13(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,<GIC_PPI 14(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,<GIC_PPI 11(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,<GIC_PPI 10(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;- };
- xtal: xtal-clk {
compatible = "fixed-clock";clock-frequency = <24000000>;clock-output-names = "xtal";#clock-cells = <0>;- };
- firmware {
sm: secure-monitor {compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";};- };
- efuse: efuse {
compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";#address-cells = <1>;#size-cells = <1>;sn: sn@14 {reg = <0x14 0x10>;};eth_mac: eth_mac@34 {reg = <0x34 0x10>;};bid: bid@46 {reg = <0x46 0x30>;};- };
- scpi {
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";mboxes = <&mailbox 1 &mailbox 2>;shmem = <&cpu_scp_lpri &cpu_scp_hpri>;scpi_clocks: clocks {compatible = "arm,scpi-clocks";scpi_dvfs: scpi_clocks@0 {compatible = "arm,scpi-dvfs-clocks";#clock-cells = <1>;clock-indices = <0>;clock-output-names = "vcpu";};};scpi_sensors: sensors {compatible = "arm,scpi-sensors";#thermal-sensor-cells = <1>;};- };
- soc {
compatible = "simple-bus";#address-cells = <2>;#size-cells = <2>;ranges;cbus: cbus@c1100000 {compatible = "simple-bus";reg = <0x0 0xc1100000 0x0 0x100000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;reset: reset-controller@4404 {compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";reg = <0x0 0x04404 0x0 0x20>;#reset-cells = <1>;};uart_A: serial@84c0 {compatible = "amlogic,meson-uart";reg = <0x0 0x84c0 0x0 0x14>;interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};uart_B: serial@84dc {compatible = "amlogic,meson-uart";reg = <0x0 0x84dc 0x0 0x14>;interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};i2c_A: i2c@8500 {compatible = "amlogic,meson-gxbb-i2c";reg = <0x0 0x08500 0x0 0x20>;interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;status = "disabled";};pwm_ab: pwm@8550 {compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";reg = <0x0 0x08550 0x0 0x10>;#pwm-cells = <3>;status = "disabled";};pwm_cd: pwm@8650 {compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";reg = <0x0 0x08650 0x0 0x10>;#pwm-cells = <3>;status = "disabled";};pwm_ef: pwm@86c0 {compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";reg = <0x0 0x086c0 0x0 0x10>;#pwm-cells = <3>;status = "disabled";};uart_C: serial@8700 {compatible = "amlogic,meson-uart";reg = <0x0 0x8700 0x0 0x14>;interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};i2c_B: i2c@87c0 {compatible = "amlogic,meson-gxbb-i2c";reg = <0x0 0x087c0 0x0 0x20>;interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;status = "disabled";};i2c_C: i2c@87e0 {compatible = "amlogic,meson-gxbb-i2c";reg = <0x0 0x087e0 0x0 0x20>;interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;status = "disabled";};watchdog@98d0 {compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";reg = <0x0 0x098d0 0x0 0x10>;clocks = <&xtal>;};};gic: interrupt-controller@c4301000 {compatible = "arm,gic-400";reg = <0x0 0xc4301000 0 0x1000>,<0x0 0xc4302000 0 0x2000>,<0x0 0xc4304000 0 0x2000>,<0x0 0xc4306000 0 0x2000>;interrupt-controller;interrupts = <GIC_PPI 9(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;#interrupt-cells = <3>;#address-cells = <0>;};sram: sram@c8000000 {compatible = "amlogic,meson-gxbb-sram", "mmio-sram";reg = <0x0 0xc8000000 0x0 0x14000>;#address-cells = <1>;#size-cells = <1>;ranges = <0 0x0 0xc8000000 0x14000>;cpu_scp_lpri: scp-shmem@0 {compatible = "amlogic,meson-gxbb-scp-shmem";reg = <0x13000 0x400>;};cpu_scp_hpri: scp-shmem@200 {compatible = "amlogic,meson-gxbb-scp-shmem";reg = <0x13400 0x400>;};};aobus: aobus@c8100000 {compatible = "simple-bus";reg = <0x0 0xc8100000 0x0 0x100000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;uart_AO: serial@4c0 {compatible = "amlogic,meson-uart";reg = <0x0 0x004c0 0x0 0x14>;interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};uart_AO_B: serial@4e0 {compatible = "amlogic,meson-uart";reg = <0x0 0x004e0 0x0 0x14>;interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};ir: ir@580 {compatible = "amlogic,meson-gxbb-ir";reg = <0x0 0x00580 0x0 0x40>;interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;status = "disabled";};};periphs: periphs@c8834000 {compatible = "simple-bus";reg = <0x0 0xc8834000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;rng {compatible = "amlogic,meson-rng";reg = <0x0 0x0 0x0 0x4>;};};hiubus: hiubus@c883c000 {compatible = "simple-bus";reg = <0x0 0xc883c000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;mailbox: mailbox@404 {compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";reg = <0 0x404 0 0x4c>;interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,<0 209 IRQ_TYPE_EDGE_RISING>,<0 210 IRQ_TYPE_EDGE_RISING>;#mbox-cells = <1>;};};ethmac: ethernet@c9410000 {compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";reg = <0x0 0xc9410000 0x0 0x100000x0 0xc8834540 0x0 0x4>;interrupts = <0 8 1>;interrupt-names = "macirq";phy-mode = "rgmii";status = "disabled";};apb: apb@d0000000 {compatible = "simple-bus";reg = <0x0 0xd0000000 0x0 0x200000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;sd_emmc_a: mmc@70000 {compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";reg = <0x0 0x70000 0x0 0x2000>;interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;status = "disabled";};sd_emmc_b: mmc@72000 {compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";reg = <0x0 0x72000 0x0 0x2000>;interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;status = "disabled";};sd_emmc_c: mmc@74000 {compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";reg = <0x0 0x74000 0x0 0x2000>;interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;status = "disabled";};};vpu: vpu@d0100000 {compatible = "amlogic,meson-gx-vpu";reg = <0x0 0xd0100000 0x0 0x100000>,<0x0 0xc883c000 0x0 0x1000>,<0x0 0xc8838000 0x0 0x1000>;reg-names = "vpu", "hhi", "dmc";interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;/* CVBS VDAC output port */cvbs_vdac_port: port@0 {reg = <0>;};};- };
+}; diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts index 79bee64..c737183 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -64,6 +64,18 @@ reg = <0x0 0x0 0x0 0x80000000>; };
- usb_otg_pwr: regulator-usb-pwrs {
compatible = "regulator-fixed";regulator-name = "USB_OTG_PWR";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- leds { compatible = "gpio-leds"; blue {
@@ -73,6 +85,60 @@ default-state = "off"; }; };
- tflash_vdd: regulator-tflash_vdd {
/** signal name from schematics: TFLASH_VDD_EN*/compatible = "regulator-fixed";regulator-name = "TFLASH_VDD";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio_ao GPIOAO_12 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- tf_io: gpio-regulator-tf_io {
compatible = "regulator-gpio";regulator-name = "TF_IO";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <3300000>;/** signal name from schematics: TF_3V3N_1V8_EN*/gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;gpios-states = <0>;states = <3300000 01800000 1>;- };
- vcc1v8: regulator-vcc1v8 {
compatible = "regulator-fixed";regulator-name = "VCC1V8";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;- };
- vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";regulator-name = "VCC3V3";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;- };
- emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;- };
+};
+&scpi_clocks {
- status = "disabled";
};
&uart_AO { @@ -83,6 +149,85 @@
ðmac { status = "okay";
- pinctrl-0 = <ð_pins>;
- pinctrl-0 = <ð_rgmii_pins>;
- pinctrl-names = "default";
- phy-handle = <ð_phy0>;
- mdio {
compatible = "snps,dwmac-mdio";#address-cells = <1>;#size-cells = <0>;eth_phy0: ethernet-phy@0 {reg = <0>;eee-broken-1000t;};- };
+};
+&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default";
};
+&i2c_A {
- status = "okay";
- pinctrl-0 = <&i2c_a_pins>;
- pinctrl-names = "default";
+};
+&usb0_phy {
- status = "okay";
- phy-supply = <&usb_otg_pwr>;
+};
+&usb1_phy {
- status = "okay";
+};
+&usb0 {
- status = "okay";
+};
+&usb1 {
- status = "okay";
+};
+/* SD */ +&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-names = "default";
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
- cd-inverted;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&tf_io>;
+};
+/* eMMC */ +&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>;
- pinctrl-names = "default";
- bus-width = <8>;
- cap-sd-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc3v3>;
- vqmmc-supply = <&vcc1v8>;
+}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi index e502c24..39a774a 100644 --- a/arch/arm/dts/meson-gxbb.dtsi +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -40,307 +40,477 @@
OTHER DEALINGS IN THE SOFTWARE.*/
-#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "meson-gx.dtsi" #include <dt-bindings/gpio/meson-gxbb-gpio.h> #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> +#include <dt-bindings/clock/gxbb-clkc.h> +#include <dt-bindings/clock/gxbb-aoclkc.h> +#include <dt-bindings/reset/gxbb-aoclkc.h>
/ { compatible = "amlogic,meson-gxbb";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <0x2>;#size-cells = <0x0>;cpu0: cpu@0 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x0>;enable-method = "psci";
- soc {
usb0_phy: phy@c0000000 {compatible = "amlogic,meson-gxbb-usb2-phy";#phy-cells = <0>;reg = <0x0 0xc0000000 0x0 0x20>;resets = <&reset RESET_USB_OTG>;clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;clock-names = "usb_general", "usb";status = "disabled";
cpu1: cpu@1 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x1>;enable-method = "psci";
usb1_phy: phy@c0000020 {compatible = "amlogic,meson-gxbb-usb2-phy";#phy-cells = <0>;reg = <0x0 0xc0000020 0x0 0x20>;resets = <&reset RESET_USB_OTG>;clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;clock-names = "usb_general", "usb";status = "disabled";
cpu2: cpu@2 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x2>;enable-method = "psci";
usb0: usb@c9000000 {compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";reg = <0x0 0xc9000000 0x0 0x40000>;interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;clock-names = "otg";phys = <&usb0_phy>;phy-names = "usb2-phy";dr_mode = "host";status = "disabled";
cpu3: cpu@3 {device_type = "cpu";compatible = "arm,cortex-a53", "arm,armv8";reg = <0x0 0x3>;enable-method = "psci";
usb1: usb@c9100000 {compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";reg = <0x0 0xc9100000 0x0 0x40000>;interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;clock-names = "otg";phys = <&usb1_phy>;phy-names = "usb2-phy";dr_mode = "host";status = "disabled";+};
- arm-pmu {
compatible = "arm,cortex-a53-pmu";interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;+&cbus {
- spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc";reg = <0x0 0x08c80 0x0 0x80>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_SPI>;status = "disabled";+};
+ðmac {
- clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,<&clkc CLKID_MPLL2>;- clock-names = "stmmaceth", "clkin0", "clkin1";
+};
+&aobus {
- pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson-gxbb-aobus-pinctrl";#address-cells = <2>;#size-cells = <2>;ranges;gpio_ao: bank@14 {reg = <0x0 0x00014 0x0 0x8>,<0x0 0x0002c 0x0 0x4>,<0x0 0x00024 0x0 0x8>;reg-names = "mux", "pull", "gpio";gpio-controller;#gpio-cells = <2>;};uart_ao_a_pins: uart_ao_a {mux {groups = "uart_tx_ao_a", "uart_rx_ao_a";function = "uart_ao";};};uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {mux {groups = "uart_cts_ao_a","uart_rts_ao_a";function = "uart_ao";};};uart_ao_b_pins: uart_ao_b {mux {groups = "uart_tx_ao_b", "uart_rx_ao_b";function = "uart_ao_b";};};uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {mux {groups = "uart_cts_ao_b","uart_rts_ao_b";function = "uart_ao_b";};};
- psci {
compatible = "arm,psci-0.2";method = "smc";
remote_input_ao_pins: remote_input_ao {mux {groups = "remote_input_ao";function = "remote_input_ao";};};i2c_ao_pins: i2c_ao {mux {groups = "i2c_sck_ao","i2c_sda_ao";function = "i2c_ao";};};pwm_ao_a_3_pins: pwm_ao_a_3 {mux {groups = "pwm_ao_a_3";function = "pwm_ao_a_3";};};pwm_ao_a_6_pins: pwm_ao_a_6 {mux {groups = "pwm_ao_a_6";function = "pwm_ao_a_6";};};pwm_ao_a_12_pins: pwm_ao_a_12 {mux {groups = "pwm_ao_a_12";function = "pwm_ao_a_12";};};pwm_ao_b_pins: pwm_ao_b {mux {groups = "pwm_ao_b";function = "pwm_ao_b";};};
- timer {
compatible = "arm,armv8-timer";interrupts = <GIC_PPI 13(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,<GIC_PPI 14(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,<GIC_PPI 11(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,<GIC_PPI 10(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
- clkc_AO: clock-controller@040 {
compatible = "amlogic,gxbb-aoclkc";reg = <0x0 0x00040 0x0 0x4>;#clock-cells = <1>;#reset-cells = <1>;
- xtal: xtal-clk {
compatible = "fixed-clock";clock-frequency = <24000000>;clock-output-names = "xtal";#clock-cells = <0>;
- pwm_ab_AO: pwm@550 {
compatible = "amlogic,meson-gxbb-pwm";reg = <0x0 0x0550 0x0 0x10>;#pwm-cells = <3>;status = "disabled";
- soc {
compatible = "simple-bus";
- i2c_AO: i2c@500 {
compatible = "amlogic,meson-gxbb-i2c";reg = <0x0 0x500 0x0 0x20>;interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc CLKID_AO_I2C>;#address-cells = <1>;#size-cells = <0>;status = "disabled";- };
+};
+&periphs {
- pinctrl_periphs: pinctrl@4b0 {
compatible = "amlogic,meson-gxbb-periphs-pinctrl";
cbus: cbus@c1100000 {compatible = "simple-bus";reg = <0x0 0xc1100000 0x0 0x100000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;reset: reset-controller@4404 {compatible = "amlogic,meson-gxbb-reset";reg = <0x0 0x04404 0x0 0x20>;#reset-cells = <1>;};uart_A: serial@84c0 {compatible = "amlogic,meson-uart";reg = <0x0 0x84c0 0x0 0x14>;interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};uart_B: serial@84dc {compatible = "amlogic,meson-uart";reg = <0x0 0x84dc 0x0 0x14>;interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};uart_C: serial@8700 {compatible = "amlogic,meson-uart";reg = <0x0 0x8700 0x0 0x14>;interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};};gic: interrupt-controller@c4301000 {compatible = "arm,gic-400";reg = <0x0 0xc4301000 0 0x1000>,<0x0 0xc4302000 0 0x2000>,<0x0 0xc4304000 0 0x2000>,<0x0 0xc4306000 0 0x2000>;interrupt-controller;interrupts = <GIC_PPI 9(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;#interrupt-cells = <3>;#address-cells = <0>;};aobus: aobus@c8100000 {compatible = "simple-bus";reg = <0x0 0xc8100000 0x0 0x100000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;pinctrl_aobus: pinctrl@14 {compatible = "amlogic,meson-gxbb-aobus-pinctrl";#address-cells = <2>;#size-cells = <2>;ranges;gpio_ao: bank@14 {reg = <0x0 0x00014 0x0 0x8>,<0x0 0x0002c 0x0 0x4>,<0x0 0x00024 0x0 0x8>;reg-names = "mux", "pull", "gpio";gpio-controller;#gpio-cells = <2>;};uart_ao_a_pins: uart_ao_a {mux {groups = "uart_tx_ao_a", "uart_rx_ao_a";function = "uart_ao";};};};uart_AO: serial@4c0 {compatible = "amlogic,meson-uart";reg = <0x0 0x004c0 0x0 0x14>;interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;clocks = <&xtal>;status = "disabled";};};periphs: periphs@c8834000 {compatible = "simple-bus";reg = <0x0 0xc8834000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;rng {compatible = "amlogic,meson-rng";reg = <0x0 0x0 0x0 0x4>;};pinctrl_periphs: pinctrl@4b0 {compatible = "amlogic,meson-gxbb-periphs-pinctrl";#address-cells = <2>;#size-cells = <2>;ranges;gpio: bank@4b0 {reg = <0x0 0x004b0 0x0 0x28>,<0x0 0x004e8 0x0 0x14>,<0x0 0x00120 0x0 0x14>,<0x0 0x00430 0x0 0x40>;reg-names = "mux", "pull", "pull-enable", "gpio";gpio-controller;#gpio-cells = <2>;};emmc_pins: emmc {mux {groups = "emmc_nand_d07","emmc_cmd","emmc_clk";function = "emmc";};};sdcard_pins: sdcard {mux {groups = "sdcard_d0","sdcard_d1","sdcard_d2","sdcard_d3","sdcard_cmd","sdcard_clk";function = "sdcard";};};uart_a_pins: uart_a {mux {groups = "uart_tx_a","uart_rx_a";function = "uart_a";};};uart_b_pins: uart_b {mux {groups = "uart_tx_b","uart_rx_b";function = "uart_b";};};uart_c_pins: uart_c {mux {groups = "uart_tx_c","uart_rx_c";function = "uart_c";};};eth_pins: eth_c {mux {groups = "eth_mdio","eth_mdc","eth_clk_rx_clk","eth_rx_dv","eth_rxd0","eth_rxd1","eth_rxd2","eth_rxd3","eth_rgmii_tx_clk","eth_tx_en","eth_txd0","eth_txd1","eth_txd2","eth_txd3";function = "eth";};};};};hiubus: hiubus@c883c000 {compatible = "simple-bus";reg = <0x0 0xc883c000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;clkc: clock-controller@0 {compatible = "amlogic,gxbb-clkc";#clock-cells = <1>;reg = <0x0 0x0 0x0 0x3db>;};};apb: apb@d0000000 {compatible = "simple-bus";reg = <0x0 0xd0000000 0x0 0x200000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;};ethmac: ethernet@c9410000 {compatible = "amlogic,meson6-dwmac", "snps,dwmac";reg = <0x0 0xc9410000 0x0 0x100000x0 0xc8834540 0x0 0x4>;interrupts = <0 8 1>;interrupt-names = "macirq";clocks = <&xtal>;clock-names = "stmmaceth";phy-mode = "rgmii";status = "disabled";
gpio: bank@4b0 {reg = <0x0 0x004b0 0x0 0x28>,<0x0 0x004e8 0x0 0x14>,<0x0 0x00120 0x0 0x14>,<0x0 0x00430 0x0 0x40>;reg-names = "mux", "pull", "pull-enable", "gpio";gpio-controller;#gpio-cells = <2>;};emmc_pins: emmc {mux {groups = "emmc_nand_d07","emmc_cmd","emmc_clk","emmc_ds";function = "emmc";};};nor_pins: nor {mux {groups = "nor_d","nor_q","nor_c","nor_cs";function = "nor";};};sdcard_pins: sdcard {mux {groups = "sdcard_d0","sdcard_d1","sdcard_d2","sdcard_d3","sdcard_cmd","sdcard_clk";function = "sdcard";};};sdio_pins: sdio {mux {groups = "sdio_d0","sdio_d1","sdio_d2","sdio_d3","sdio_cmd","sdio_clk";function = "sdio";};};sdio_irq_pins: sdio_irq {mux {groups = "sdio_irq";function = "sdio";};};uart_a_pins: uart_a {mux {groups = "uart_tx_a","uart_rx_a";function = "uart_a";};};uart_a_cts_rts_pins: uart_a_cts_rts {mux {groups = "uart_cts_a","uart_rts_a";function = "uart_a";};};uart_b_pins: uart_b {mux {groups = "uart_tx_b","uart_rx_b";function = "uart_b";};};uart_b_cts_rts_pins: uart_b_cts_rts {mux {groups = "uart_cts_b","uart_rts_b";function = "uart_b";};};uart_c_pins: uart_c {mux {groups = "uart_tx_c","uart_rx_c";function = "uart_c";};};uart_c_cts_rts_pins: uart_c_cts_rts {mux {groups = "uart_cts_c","uart_rts_c";function = "uart_c";};};i2c_a_pins: i2c_a {mux {groups = "i2c_sck_a","i2c_sda_a";function = "i2c_a";};};i2c_b_pins: i2c_b {mux {groups = "i2c_sck_b","i2c_sda_b";function = "i2c_b";};};i2c_c_pins: i2c_c {mux {groups = "i2c_sck_c","i2c_sda_c";function = "i2c_c";};};eth_rgmii_pins: eth-rgmii {mux {groups = "eth_mdio","eth_mdc","eth_clk_rx_clk","eth_rx_dv","eth_rxd0","eth_rxd1","eth_rxd2","eth_rxd3","eth_rgmii_tx_clk","eth_tx_en","eth_txd0","eth_txd1","eth_txd2","eth_txd3";function = "eth";};};eth_rmii_pins: eth-rmii {mux {groups = "eth_mdio","eth_mdc","eth_clk_rx_clk","eth_rx_dv","eth_rxd0","eth_rxd1","eth_tx_en","eth_txd0","eth_txd1";function = "eth";};};pwm_a_x_pins: pwm_a_x {mux {groups = "pwm_a_x";function = "pwm_a_x";};};pwm_a_y_pins: pwm_a_y {mux {groups = "pwm_a_y";function = "pwm_a_y";};};pwm_b_pins: pwm_b {mux {groups = "pwm_b";function = "pwm_b";};};pwm_d_pins: pwm_d {mux {groups = "pwm_d";function = "pwm_d";};};pwm_e_pins: pwm_e {mux {groups = "pwm_e";function = "pwm_e";};};pwm_f_x_pins: pwm_f_x {mux {groups = "pwm_f_x";function = "pwm_f_x";};};pwm_f_y_pins: pwm_f_y {mux {groups = "pwm_f_y";function = "pwm_f_y";};};hdmi_hpd_pins: hdmi_hpd {mux {groups = "hdmi_hpd";function = "hdmi_hpd";};};hdmi_i2c_pins: hdmi_i2c {mux {groups = "hdmi_sda", "hdmi_scl";function = "hdmi_i2c";};};
+&hiubus {
- clkc: clock-controller@0 {
compatible = "amlogic,gxbb-clkc";#clock-cells = <1>;reg = <0x0 0x0 0x0 0x3db>;- };
+};
+&i2c_A {
- clocks = <&clkc CLKID_I2C>;
+};
+&i2c_B {
- clocks = <&clkc CLKID_I2C>;
+};
+&i2c_C {
- clocks = <&clkc CLKID_I2C>;
+};
+&sd_emmc_a {
- clocks = <&clkc CLKID_SD_EMMC_A>,
<&xtal>,<&clkc CLKID_FCLK_DIV2>;- clock-names = "core", "clkin0", "clkin1";
+};
+&sd_emmc_b {
- clocks = <&clkc CLKID_SD_EMMC_B>,
<&xtal>,<&clkc CLKID_FCLK_DIV2>;- clock-names = "core", "clkin0", "clkin1";
+};
+&sd_emmc_c {
- clocks = <&clkc CLKID_SD_EMMC_C>,
<&xtal>,<&clkc CLKID_FCLK_DIV2>;- clock-names = "core", "clkin0", "clkin1";
+};
+&vpu {
- compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
+}; diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h b/include/dt-bindings/clock/gxbb-aoclkc.h new file mode 100644 index 0000000..3175148 --- /dev/null +++ b/include/dt-bindings/clock/gxbb-aoclkc.h @@ -0,0 +1,66 @@ +/*
- This file is provided under a dual BSD/GPLv2 license. When using or
- redistributing this file, you may do so under either license.
- GPL LICENSE SUMMARY
- Copyright (c) 2016 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- This program is free software; you can redistribute it and/or modify
- it under the terms of version 2 of the GNU General Public License as
- published by the Free Software Foundation.
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, see http://www.gnu.org/licenses/.
- The full GNU General Public License is included in this distribution
- in the file called COPYING.
- BSD LICENSE
- Copyright (c) 2016 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions
- are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
- Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
+#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_GXBB_AOCLK +#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_GXBB_AOCLK
+#define CLKID_AO_REMOTE 0 +#define CLKID_AO_I2C_MASTER 1 +#define CLKID_AO_I2C_SLAVE 2 +#define CLKID_AO_UART1 3 +#define CLKID_AO_UART2 4 +#define CLKID_AO_IR_BLASTER 5
+#endif diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h new file mode 100644 index 0000000..692846c --- /dev/null +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -0,0 +1,34 @@ +/*
- GXBB clock tree IDs
- */
+#ifndef __GXBB_CLKC_H +#define __GXBB_CLKC_H
+#define CLKID_CPUCLK 1 +#define CLKID_HDMI_PLL 2 +#define CLKID_FCLK_DIV2 4 +#define CLKID_FCLK_DIV3 5 +#define CLKID_FCLK_DIV4 6 +#define CLKID_CLK81 12 +#define CLKID_MPLL2 15 +#define CLKID_SPI 34 +#define CLKID_I2C 22 +#define CLKID_SAR_ADC 23 +#define CLKID_ETH 36 +#define CLKID_USB0 50 +#define CLKID_USB1 51 +#define CLKID_USB 55 +#define CLKID_HDMI_PCLK 63 +#define CLKID_USB1_DDR_BRIDGE 64 +#define CLKID_USB0_DDR_BRIDGE 65 +#define CLKID_SANA 69 +#define CLKID_GCLK_VENCI_INT0 77 +#define CLKID_AO_I2C 93 +#define CLKID_SD_EMMC_A 94 +#define CLKID_SD_EMMC_B 95 +#define CLKID_SD_EMMC_C 96 +#define CLKID_SAR_ADC_CLK 97 +#define CLKID_SAR_ADC_SEL 98
+#endif /* __GXBB_CLKC_H */ diff --git a/include/dt-bindings/reset/gxbb-aoclkc.h b/include/dt-bindings/reset/gxbb-aoclkc.h new file mode 100644 index 0000000..9e3fd60 --- /dev/null +++ b/include/dt-bindings/reset/gxbb-aoclkc.h @@ -0,0 +1,66 @@ +/*
- This file is provided under a dual BSD/GPLv2 license. When using or
- redistributing this file, you may do so under either license.
- GPL LICENSE SUMMARY
- Copyright (c) 2016 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- This program is free software; you can redistribute it and/or modify
- it under the terms of version 2 of the GNU General Public License as
- published by the Free Software Foundation.
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, see http://www.gnu.org/licenses/.
- The full GNU General Public License is included in this distribution
- in the file called COPYING.
- BSD LICENSE
- Copyright (c) 2016 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions
- are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
- Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
+#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_GXBB_AOCLK +#define DT_BINDINGS_RESET_AMLOGIC_MESON_GXBB_AOCLK
+#define RESET_AO_REMOTE 0 +#define RESET_AO_I2C_MASTER 1 +#define RESET_AO_I2C_SLAVE 2 +#define RESET_AO_UART1 3 +#define RESET_AO_UART2 4 +#define RESET_AO_IR_BLASTER 5
+#endif