
Hi
Some minor below.
Alan Carvalho de Assis skrev:
This patch adds support to iMX27ADS development board. This board has 128MB RAM, 32MB NOR Flash and 128MB NAND Flash. Currently only booting from NOR is supported.
Signed-off-by: Alan Carvalho de Assis acassis@gmail.com
MAINTAINERS | 3 + MAKEALL | 1 + Makefile | 3 + board/freescale/mx27ads/Makefile | 51 ++++++++ board/freescale/mx27ads/config.mk | 1 + board/freescale/mx27ads/lowlevel_init.S | 128 +++++++++++++++++++ board/freescale/mx27ads/mx27ads.c | 93 ++++++++++++++ board/freescale/mx27ads/u-boot.lds | 56 +++++++++ include/configs/mx27ads.h | 202 +++++++++++++++++++++++++++++++ 9 files changed, 538 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx27ads/Makefile create mode 100644 board/freescale/mx27ads/config.mk create mode 100644 board/freescale/mx27ads/lowlevel_init.S create mode 100644 board/freescale/mx27ads/mx27ads.c create mode 100644 board/freescale/mx27ads/u-boot.lds create mode 100644 include/configs/mx27ads.h
diff --git a/MAINTAINERS b/MAINTAINERS index e9db278..5b25188 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -550,6 +550,9 @@ Thomas Elste info@elste.org
modnet50 ARM720T (NET+50)
+Alan Carvalho de Assis acassis@gmail.com
- mx27ads i.MX27
The list shall be kept sorted by maintainer name. So the mx27ads shall be moved.
Fabio Estevam Fabio.Estevam@freescale.com
mx31pdk i.MX31 diff --git a/MAKEALL b/MAKEALL index f0ed8ea..8411eef 100755 --- a/MAKEALL +++ b/MAKEALL @@ -520,6 +520,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \
- mx27ads \
The list is sorted alphabetically so move this down a bit.
imx27lite \ lpd7a400 \ mv88f6281gtw_ge \ diff --git a/Makefile b/Makefile index 0449a5b..6fa4b28 100644 --- a/Makefile +++ b/Makefile @@ -2961,6 +2961,9 @@ davinci_dm365evm_config : unconfig imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
+mx27ads_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs mx27ads freescale mx27
lpd7a400_config \ lpd7a404_config: unconfig @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
diff --git a/board/freescale/mx27ads/lowlevel_init.S b/board/freescale/mx27ads/lowlevel_init.S new file mode 100644 index 0000000..a4e1191 --- /dev/null +++ b/board/freescale/mx27ads/lowlevel_init.S @@ -0,0 +1,128 @@ +/*
- Copyright (C) 2008, Guennadi Liakhovetski lg@denx.de
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+/*
- For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
- Applications Processor Reference Manual, Rev. 0.2".
- */
+#include <config.h> +#include <asm/macro.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/asm-offsets.h>
+.macro sdram_init
- /*
* DDR on CSD0
*/
- write32 0xD8001010 0x00000008
I would insert a comma (,) after the first argument to the macro. Didn't know it worked without. The same comment applies to the rest of this file. Don't know what the U-boot coding standard says about this though.
- write32 0x10027828 0x55555555
- write32 0x10027830 0x55555555
- write32 0x10027834 0x55555555
- write32 0x10027838 0x00005005
- write32 0x1002783C 0x15555555
- write32 0xD8001010 0x00000004
- write32 0xD8001004 0x006ac73a
- write32 0xD8001000 0x92100000
- write32 0xA0000F00 0x00000000
- write32 0xD8001000 0xA2100000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xD8001000 0xA2200000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xA0000F00 0x00000000
- write32 0xD8001000 0xb2100000
- ldr r0, =0xA0000033
- mov r1, #0xda
- strb r1, [r0]
- ldr r0, =0xA1000000
- mov r1, #0xff
- strb r1, [r0]
- write32 0xD8001000 0x82226080
+.endm
+.globl lowlevel_init +lowlevel_init:
- mov r10, lr
- /* ahb lite ip interface */
- write32 AIPI1_PSR0 0x20040304
- write32 AIPI1_PSR1 0xDFFBFCFB
- write32 AIPI2_PSR0 0x00000000
- write32 AIPI2_PSR1 0xFFFFFFFF
- /* disable mpll/spll */
- ldr r0, =CSCR
- ldr r1, [r0]
- bic r1, r1, #0x03
- str r1, [r0]
- /*
* pll clock initialization - see section 3.4.3 of the i.MX27 manual
*
* FIXME: Using the 399*2 MHz values from table 3-8 doens't work
* with 1.2 V core voltage! Find out if this is
* documented somewhere.
*/
- write32 MPCTL0 0x1EF15D5 /* MPLL = 199.5*2 MHz */
- write32 SPCTL0 0x043A1C09 /* SPLL = FIXME (needs review) */
- /*
* ARM clock = (399 MHz / 2) / (ARM divider = 1) = 200 MHz
* AHB clock = (399 MHz / 3) / (AHB divider = 2) = 66.5 MHz
* System clock (HCLK) = 133 MHz
*/
- write32 CSCR, (0x33F08107 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
- /* add some delay here */
- mov r1, #0x1000
+1: subs r1, r1, #0x1
- bne 1b
- /* clock gating enable */
- write32 0x10027818 0x00050f08
- /* peripheral clock divider */
- write32 PCDR0 0x120470C3 /* FIXME */
- write32 PCDR1 0x03030303 /* PERDIV1=08 @133 MHz */
/* PERDIV1=04 @266 MHz *
* /
The last line with '* /' looks a bit odd compated to the other comments.
- /* Configure PCCR0 and PCCR1*/
- write32 PCCR0 0xFFFFFFFF
- write32 PCCR1 0xFFFFFFFC
- /* skip sdram initialization if we run from ram */
- cmp pc, #0xa0000000
- bls 1f
- cmp pc, #0xc0000000
- bhi 1f
- mov pc,r10
+1:
- sdram_init
- mov pc,r10
diff --git a/include/configs/mx27ads.h b/include/configs/mx27ads.h new file mode 100644 index 0000000..3360d76 --- /dev/null +++ b/include/configs/mx27ads.h
<...>
+/*
- Ethernet
- */
+#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0x1f +#define CONFIG_MII +#define CONFIG_NET_MULTI
+/*#define CONFIG_DRIVER_CS8900 1 +#define CS8900_BASE 0xD4020300 +#define CS8900_BUS16 1*/
Does the board have a CS8900 as well?
Regards, Magnus