On PPv2.2 we enable PHY polling, so we also need to configure the PHY address in the specific PHY address rgisters.
Signed-off-by: Stefan Roese sr@denx.de Cc: Stefan Chulski stefanc@marvell.com Cc: Kostya Porotchkin kostap@marvell.com Cc: Nadav Haklai nadavh@marvell.com Acked-by: Joe Hershberger joe.hershberger@ni.com
---
Changes in v2: - Added Acked-by from Joe
drivers/net/mvpp2.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index cc6d42255c..086ce32851 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -5338,6 +5338,14 @@ static void mvpp2_stop(struct udevice *dev) mvpp2_cleanup_txqs(port); }
+static int mvpp22_smi_phy_addr_cfg(struct mvpp2_port *port) +{ + writel(port->phyaddr, port->priv->iface_base + + MVPP22_SMI_PHY_ADDR_REG(port->gop_id)); + + return 0; +} + static int mvpp2_base_probe(struct udevice *dev) { struct mvpp2 *priv = dev_get_priv(dev); @@ -5476,6 +5484,9 @@ static int mvpp2_probe(struct udevice *dev) port->base = priv->iface_base + MVPP22_PORT_BASE + port->gop_id * MVPP22_PORT_OFFSET;
+ /* Set phy address of the port */ + mvpp22_smi_phy_addr_cfg(port); + /* GoP Init */ gop_port_init(port); }