7 Dec
2021
7 Dec
'21
8:56 a.m.
On 12/7/21 7:59 AM, Jagan Teki wrote:
On Wed, Nov 3, 2021 at 10:17 PM Tudor Ambarus tudor.ambarus@microchip.com wrote:
sama7g5 QSPI has: 1/ One Octal Serial Peripheral Interfaces (QSPI0) Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported 2/ One Quad Serial Peripheral Interfaces (QSPI1) Supporting Up to 90 MHz DDR/133 MHz SDR
The QSPI controller of SAMA7G5 uses different clock domains, hence extra synchronization operations must be performed before accessing some registers. Differentiate between the versions of the IP using has_gclk. Differentiate between QSPI0 and QSPI1 with has_octal.
Signed-off-by: Tudor Ambarus tudor.ambarus@microchip.com
Reviewed-by: Jagan Teki jagan@amarulasolutions.com
Applied to u-boot-at91/next, thanks !