Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- drivers/phy/Kconfig | 7 ++ drivers/phy/Makefile | 1 + drivers/phy/bcm6318-usbh-phy.c | 144 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 152 insertions(+) create mode 100644 drivers/phy/bcm6318-usbh-phy.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index d3fa9ded2a..4e9d09910c 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -59,6 +59,13 @@ config SPL_NOP_PHY This is useful when a driver uses the PHY framework but no real PHY hardware exists.
+config BCM6318_USBH_PHY + bool "BCM6318 USBH PHY support" + depends on PHY && ARCH_BMIPS + select POWER_DOMAIN + help + Support for the Broadcom MIPS BCM6318 USBH PHY. + config BCM6348_USBH_PHY bool "BCM6348 USBH PHY support" depends on PHY && ARCH_BMIPS diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index d8239854a3..68087ae3b1 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -7,6 +7,7 @@
obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o +obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c new file mode 100644 index 0000000000..9f22269ced --- /dev/null +++ b/drivers/phy/bcm6318-usbh-phy.c @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2018 Álvaro Fernández Rojas noltari@gmail.com + * + * Derived from linux/arch/mips/bcm63xx/usb-common.c: + * Copyright 2008 Maxime Bizon mbizon@freebox.fr + * Copyright 2013 Florian Fainelli florian@openwrt.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <generic-phy.h> +#include <power-domain.h> +#include <reset.h> +#include <asm/io.h> +#include <dm/device.h> + +/* USBH Setup register */ +#define USBH_SETUP_REG 0x00 +#define USBH_SETUP_IOC BIT(4) + +/* USBH PLL Control register */ +#define USBH_PLL_REG 0x04 +#define USBH_PLL_SUSP_EN BIT(27) +#define USBH_PLL_IDDQ_PWRDN BIT(31) + +/* USBH Swap Control register */ +#define USBH_SWAP_REG 0x0c +#define USBH_SWAP_OHCI_DATA BIT(0) +#define USBH_SWAP_OHCI_ENDIAN BIT(1) +#define USBH_SWAP_EHCI_DATA BIT(3) +#define USBH_SWAP_EHCI_ENDIAN BIT(4) + +/* USBH Sim Control register */ +#define USBH_SIM_REG 0x20 +#define USBH_SIM_LADDR BIT(5) + +struct bcm6318_usbh_priv { + void __iomem *regs; +}; + +static int bcm6318_usbh_init(struct phy *phy) +{ + struct bcm6318_usbh_priv *priv = dev_get_priv(phy->dev); + + /* enable pll control susp */ + setbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_SUSP_EN); + + /* configure to work in native cpu endian */ + clrsetbits_be32(priv->regs + USBH_SWAP_REG, + USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN, + USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA); + + /* setup config */ + setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC); + + /* disable pll control pwrdn */ + clrbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_IDDQ_PWRDN); + + /* sim control config */ + setbits_be32(priv->regs + USBH_SIM_REG, USBH_SIM_LADDR); + + return 0; +} + +static struct phy_ops bcm6318_usbh_ops = { + .init = bcm6318_usbh_init, +}; + +static const struct udevice_id bcm6318_usbh_ids[] = { + { .compatible = "brcm,bcm6318-usbh" }, + { /* sentinel */ } +}; + +static int bcm6318_usbh_probe(struct udevice *dev) +{ + struct bcm6318_usbh_priv *priv = dev_get_priv(dev); + struct power_domain pwr_dom; + struct reset_ctl rst_ctl; + struct clk clk; + fdt_addr_t addr; + fdt_size_t size; + int ret; + + addr = devfdt_get_addr_size_index(dev, 0, &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->regs = ioremap(addr, size); + + /* enable usbh clock */ + ret = clk_get_by_name(dev, "usbh", &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + if (ret < 0) + return ret; + + ret = clk_free(&clk); + if (ret < 0) + return ret; + + /* enable power domain */ + ret = power_domain_get(dev, &pwr_dom); + if (ret < 0) + return ret; + + ret = power_domain_on(&pwr_dom); + if (ret < 0) + return ret; + + ret = power_domain_free(&pwr_dom); + if (ret < 0) + return ret; + + /* perform reset */ + ret = reset_get_by_index(dev, 0, &rst_ctl); + if (ret < 0) + return ret; + + ret = reset_deassert(&rst_ctl); + if (ret < 0) + return ret; + + ret = reset_free(&rst_ctl); + if (ret < 0) + return ret; + + mdelay(100); + + return 0; +} + +U_BOOT_DRIVER(bcm6318_usbh) = { + .name = "bcm6318-usbh", + .id = UCLASS_PHY, + .of_match = bcm6318_usbh_ids, + .ops = &bcm6318_usbh_ops, + .priv_auto_alloc_size = sizeof(struct bcm6318_usbh_priv), + .probe = bcm6318_usbh_probe, +};