A number of CONFIG symbols have crept in that are never referenced in code, so drop them here. Further, we have two symbols being enabled in headers while already enabled correctly in Kconfig, so these lines can also be removed.
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 - arch/arm/mach-mvebu/include/mach/config.h | 3 --- include/configs/cgtqmx8.h | 1 - include/configs/imx8mp_rsb3720.h | 9 --------- include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/librem5.h | 6 ------ include/configs/pico-imx8mq.h | 1 - 13 files changed, 1 insertion(+), 27 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 2862257e1f2c..9656c52e955f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -29,6 +29,7 @@ config ARCH_LS1028A select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZASC_400 select GICV3 select NXP_LSCH3_2 select SYS_FSL_HAS_CCI400 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 12758c8dd1ca..516c9eab0478 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -160,7 +160,6 @@
#elif defined(CONFIG_ARCH_LS1028A) #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } -#define CONFIG_FSL_TZASC_400
/* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 96a08104ff46..610274754837 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -27,7 +27,4 @@
#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
-/* Needed for SPI NOR booting in SPL */ -#define CONFIG_DM_SEQ_ALIAS 1 - #endif /* __MVEBU_CONFIG_H */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 91454df19720..98d4d8cf4bd9 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -12,7 +12,6 @@ #include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000
#endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 495ca313db28..d4ab6a6207d6 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -28,12 +28,6 @@ * GD_FLG_FULL_MALLOC_INIT \ * set \ */ - - -#if defined(CONFIG_NAND_BOOT) -#define CONFIG_SPL_NAND_MXS -#endif - #endif
/* ENET Config */ @@ -158,9 +152,6 @@ #define FSL_FSPI_FLASH_NUM 1 #define FSPI0_BASE_ADDR 0x30bb0000 #define FSPI0_AMBA_BASE 0x0 -#define CONFIG_FSPI_QUAD_SUPPORT - -#define CONFIG_SYS_FSL_FSPI_AHB #endif
#ifdef CONFIG_NAND_MXS diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 828bd6723727..7cf482d6de15 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index d2de2900c063..d2e1649400a7 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -12,7 +12,6 @@
#ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index bfde15e6240f..b66fc18fa5e8 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -11,7 +11,6 @@
#ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index a25efbb16bdb..4d5abe2d073b 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000
#endif diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 4f55ae49403d..93999509948a 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000
#endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e3a021c987c6..5cf6b5a6dd46 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -13,7 +13,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99)
#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/librem5.h b/include/configs/librem5.h index e17190ce9c5d..ce0a340ba26e 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -15,12 +15,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#ifdef CONFIG_SPL_BUILD - -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ - -#endif /* CONFIG_SPL_BUILD*/ - #define CFG_SYS_FSL_USDHC_NUM 2
#define CONSOLE_ON_UART1 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 4b602ea03022..be31f8a23cab 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -11,7 +11,6 @@
#ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000