Hi York,
I copied hardware team Kinjalk's explain here.
"Enabling SDHC2 on ‘00’ is not correct on revision D and later boards as the sd wifi is not on there on these revs. The IO expander was designed to override the dip switch values. So, the DIP switch values are driven through low strength drivers. The I2C reads of DIP switch settings may not be correct and reliable as the noise margin is very low. If the IO expander is driving CFG than the situation is different and reads will always be reliable."
It seemed ls1012ardb RevD reworked the SDHC2 circuit. The SDIO wifi device was removed and I2C reading of DIP switch setting was not reliable. This changes is causing many kernel error messages on RevD boards. "mmc1: Controller never released inhibit bit(s)." It's safe to disable SDHC2 in default and enable it manually when hardware configuration(DIP switch) is correct for SDHC2 since software doesn’t have way to check.
Do you think this should be fixed by hardware? If so, I will try to suggest that.
Thanks a lot.
Best regards, Yangbo Lu
-----Original Message----- From: York Sun Sent: 2017年11月30日 3:45 To: Y.b. Lu yangbo.lu@nxp.com; u-boot@lists.denx.de Subject: Re: [v2] armv8: ls1012a: enable/disable eSDHC1 through hwconfig for RDB
On 11/27/2017 12:58 AM, Yangbo Lu wrote:
For LS1012ARDB RevD and later versions, the I2C reading for DIP switch setting had been no longer reliable since the board was reworked. This patch is to add hwconfig support to enable/disable eSDHC1 manually.
What do you mean "no longer reliable"? This should be addressed by fixing the board.
York