
3 May
2017
3 May
'17
3:07 p.m.
This SoC has one gpio bank with a total of 32 GPIOs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/brcm,bcm6328.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index b287239..30c2ee8 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -63,6 +63,15 @@ mask = <0x1>; };
+ gpio: gpio-controller@10000084 { + compatible = "brcm,bcm6345-gpio"; + reg = <0x10000084 0x4>, <0x1000008c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + uart0: serial@10000100 { compatible = "brcm,bcm6345-uart"; reg = <0x10000100 0x18>;
--
2.1.4