See the README. "Data cache ... cannot be disabled ..."
To be thorough, I am not disabling cache; I am instead marking the SDRAM as cache inhibited via the BAT registers.
It was my understanding (apparently incorrect), from the README that the reason "Data cache ... cannot be disabled ..." was due to the (mis-) use cache for initialization purposes. In my case my data cache is still enabled and my CFG_INIT_RAM_ADDR block is still cacheable.
Is my understanding flawed?
David Clark Senior Software Engineer C&H Technologies, Inc Web: http:\www.chtech.com Phone: 512-733-2621 Fax: 512-733-2629 Email: dlclark@chtech.com
-----Original Message----- From: wd@denx.de [mailto:wd@denx.de] Sent: Tuesday, March 06, 2007 6:06 PM To: David Clark Cc: u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] SDRAM cache inhibit
In message 008001c7604a$661c0ff0$0f01a8c0@longhorn you wrote:
...
using an MPC8245 and have tried the following combination of iBAT and
...
In summary U-boot works with caching but it fails whenever the dBAT is set to cache inhibit for the SDRAM. Is this expected operation or is
it
further indication of an SDRAM problem?
See the README. "Data cache ... cannot be disabled ..."
Best regards,
Wolfgang Denk