Hello Everyone
Respin of a previous patch set addressing a few minor issues including:
Version 2: - Resolved the PCI_BASE_ADDRESS_1 --> PCI_BASE_ADDRESS_0 modification. It turned out to be a PCI region definition issue where the existing code was making non-generic assumptions about the allocation of the PCI address space. The code which defines PCI regions has been made board specific - Use asm-generic/unaligned.h - Added GPLv2 copyright notice to the RAM sizer code - I contacted AMD and asked them to modify the license on thier Code Kit containing this code and they have happily obliged - Fixed bug in the RAM sizer code which I noticed when comparing the now Code Kit code to the existing code
Version 3: - Added CONFIG_SYS_NS16550_PORT_MAPPED instead of using CONFIG_X86 as suggested by Nishanth Menon
This patch series can be examined as several distinct functional changes - Patches 1-3 are x86 specific build and core fixups - Patches 4-11 are x86 specific functional improvements - Patches 12-13 (*) switch the x86 port to CONFIG_SERIAL_MULTI - Patches 14-15 provide Linux boot support - Patch 16 is an sc520 specific patch (this one can be delayed) - Patches 17-18 are various eNET specific patches - Patches 19-20 make PCI region initialisation board specific - Patch 21 enables the eNET Ethernet chips (requires patched 19-20) - Patch 22 sets up the eNET for maximum PC/AT compatibilty to boot Linux - Patches 23-24 are eNET 'nice to haves' - Patch 25 updates the AMD license to GPL (I have supporting emails) - Patch 26 fixes a minor sc520 bug
(*) Patches 12 and 13 are the only patches which touch files outside the x86 tree.