Steven Scholz wrote:
Any comments on the patch?
Index: common/cmd_mii.c
RCS file: /cvsroot/u-boot/u-boot/common/cmd_mii.c,v retrieving revision 1.4 diff -p -u -r1.4 cmd_mii.c --- common/cmd_mii.c 1 Jul 2003 21:07:07 -0000 1.4 +++ common/cmd_mii.c 20 Oct 2003 16:53:16 -0000 @@ -81,7 +81,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, * check info/read/write. */ if (op == 'i') {
int j;
unsigned char j, start, end;@@ -89,7 +89,13 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, /* * Look for any and all PHYs. Valid addresses are 0..31. */
for (j = 0; j < 32; j++) {
if (argc >= 3) {start = addr; end = addr + 1;} else {start = 0; end = 32;}for (j = start; j < end; j++) { if (miiphy_info (j, &oui, &model, &rev) == 0) { printf ("PHY 0x%02X: " "OUI = 0x%04X, "Index: common/miiphyutil.c
RCS file: /cvsroot/u-boot/u-boot/common/miiphyutil.c,v retrieving revision 1.2 diff -p -u -r1.2 miiphyutil.c --- common/miiphyutil.c 8 Oct 2003 22:33:00 -0000 1.2 +++ common/miiphyutil.c 20 Oct 2003 16:53:16 -0000 @@ -47,19 +47,15 @@ int miiphy_info (unsigned char addr, unsigned char *model, unsigned char *rev) { unsigned int reg = 0;
- unsigned short tmp;
- /*
* Trick: we are reading two 16 registers into a 32 bit variable* so we do a 16 read into the high order bits of the variable (big* endian, you know), shift it down 16 bits, and the read the rest.*/- if (miiphy_read (addr, PHY_PHYIDR2, (unsigned short *) ®) != 0) {
- if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
#ifdef DEBUG printf ("PHY ID register 2 read failed\n"); #endif return (-1); }
- reg >>= 16;
- reg = tmp;
#ifdef DEBUG printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg); @@ -69,12 +65,13 @@ int miiphy_info (unsigned char addr, return (-1); }
- if (miiphy_read (addr, PHY_PHYIDR1, (unsigned short *) ®) != 0) {
- if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
#ifdef DEBUG printf ("PHY ID register 1 read failed\n"); #endif return (-1); }
- reg |= tmp << 16;
#ifdef DEBUG printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); #endif