From: Dinesh Maniyam dinesh.maniyam@intel.com
Remove SYS_NAND_BLOCK_SIZE dependency for cadence NAND. This config is not needed as the driver will send command read parameter page to identify the NAND block size during initialization.
Signed-off-by: Dinesh Maniyam dinesh.maniyam@intel.com
--- v2: - remove the "this patch is to" commit phrases --- --- drivers/mtd/nand/raw/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index a9515c7b74..90f8f4b688 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -680,7 +680,7 @@ config SYS_NAND_BLOCK_SIZE depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT || \ MVEBU_SPL_BOOT_DEVICE_NAND depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \ - !NAND_FSL_IFC && !NAND_MT7621 + !NAND_FSL_IFC && !NAND_MT7621 && !NAND_CADENCE help Number of data bytes in one eraseblock for the NAND chip on the board. This is the multiple of NAND_PAGE_SIZE and the number of