Hi John,
On 9/15/22 19:56, John Keeping wrote:
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
if (mask & DWMCI_INTMSK_DTO) { // Unreachable as DTO is cleared without being handled! return 0; }
Only clear interrupts that we have seen and are handling so that DTO is not missed.
Signed-off-by: John Keeping john@metanate.com
Awesome! I was having what I thought were stability issues on a board I'm bringing up and this fixes the issue. Thanks!
Tested-by: Quentin Schulz quentin.schulz@theobroma-systems.com (PX30-based eMMC+SD, Puma RK3399 eMMC)
Cheers, Quentin