
5 Oct
2014
5 Oct
'14
7:24 a.m.
2014-10-03 19:21 GMT+09:00 Masahiro Yamada yamada.m@jp.panasonic.com:
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.
This driver requires two CONFIG macros:
- CONFIG_SPL_NAND_DENALI Define to enable this driver.
- CONFIG_SYS_NAND_BAD_BLOCK_POS Specify bad block mark position in the oob space. Typically 0.
Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com Cc: Chin Liang See clsee@altera.com Cc: Scott Wood scottwood@freescale.com
Changes in v6: None Changes in v5:
- Remove the workaround added by v4 because the denali.h was merget into the mainline
- Add Kconfig entry
- Add comments where we read out some register values
Changes in v4:
- Add a workaround to not depend on the Denali driver posted by Chin Liang See. This driver has been taking too long: http://patchwork.ozlabs.org/patch/381305/
Changes in v3: None Changes in v2:
- Avoid unaligned access
- Replace a magic number 0x2000 with PIPELINE_ACCESS
Applied to u-boot-uniphier/master.
--
Best Regards
Masahiro Yamada